user/sven/linux.git - Linux Kernel

Age	Commit message (Expand)	Author
2020-09-21	clk: tegra: Fix missing prototype for tegra210_clk_register_emc()	Thierry Reding
2020-09-21	clk: tegra: Always program PLL_E when enabled	Thierry Reding
2020-09-21	clk: tegra: Capitalization fixes	Thierry Reding
2020-07-27	clk: tegra: pll: Improve PLLM enable-state detection	Dmitry Osipenko
2020-06-10	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds
2020-05-12	clk: tegra: Fix initial rate for pll_a on Tegra124	Thierry Reding
2020-05-12	clk: tegra: Add Tegra210 CSI TPG clock gate	Sowjanya Komatineni
2020-05-12	clk: tegra30: Use custom CCLK implementation	Dmitry Osipenko
2020-05-12	clk: tegra20: Use custom CCLK implementation	Dmitry Osipenko
2020-05-12	clk: tegra: cclk: Add helpers for handling PLLX rate changes	Dmitry Osipenko
2020-05-12	clk: tegra: pll: Add pre/post rate-change hooks	Dmitry Osipenko
2020-05-12	clk: tegra: Add custom CCLK implementation	Dmitry Osipenko
2020-05-12	clk: tegra: Remove the old emc_mux clock for Tegra210	Joseph Lo
2020-05-12	clk: tegra: Implement Tegra210 EMC clock	Joseph Lo
2020-05-12	clk: tegra: Export functions for EMC clock scaling	Joseph Lo
2020-05-12	clk: tegra: Add PLLP_UD and PLLMB_UD for Tegra210	Joseph Lo
2020-05-12	clk: tegra: Rename Tegra124 EMC clock source file	Thierry Reding
2020-03-24	clk: tegra: Use NULL for pointer initialization	Stephen Boyd
2020-03-12	clk: tegra: Remove audio clocks configuration from clock driver	Sowjanya Komatineni
2020-03-12	clk: tegra: Remove tegra_pmc_clk_init along with clk ids	Sowjanya Komatineni
2020-03-12	clk: tegra: Remove CLK_M_DIV fixed clocks	Sowjanya Komatineni
2020-03-12	clk: tegra: Fix Tegra PMC clock out parents	Sowjanya Komatineni
2020-03-12	clk: tegra: Add Tegra OSC to clock lookup	Sowjanya Komatineni
2020-03-12	clk: tegra: Add support for OSC_DIV fixed clocks	Sowjanya Komatineni
2020-01-31	Merge branches 'clk-imx', 'clk-ti', 'clk-xilinx', 'clk-nvidia', 'clk-qcom', '...	Stephen Boyd
2020-01-10	clk: tegra20/30: Explicitly set parent clock for Video Decoder	Dmitry Osipenko
2020-01-10	clk: tegra20/30: Don't pre-initialize displays parent clock	Dmitry Osipenko
2020-01-10	clk: tegra: divider: Check UART's divider enable-bit state on rate's recalcul...	Dmitry Osipenko
2020-01-10	clk: tegra: clk-dfll: Remove call to pm_runtime_irq_safe()	Sowjanya Komatineni
2020-01-08	clk: tegra: Mark fuse clock as critical	Stephen Warren
2019-12-24	clk: tegra: Fix double-free in tegra_clk_init()	Dmitry Osipenko
2019-11-13	clk: tegra: Use match_string() helper to simplify the code	YueHaibing
2019-11-11	clk: tegra: Fix build error without CONFIG_PM_SLEEP	YueHaibing
2019-11-11	clk: tegra: Optimize PLLX restore on Tegra20/30	Dmitry Osipenko
2019-11-11	clk: tegra: Add suspend and resume support on Tegra210	Sowjanya Komatineni
2019-11-11	clk: tegra: Share clk and rst register defines with Tegra clock driver	Sowjanya Komatineni
2019-11-11	clk: tegra: Use fence_udelay() during PLLU init	Sowjanya Komatineni
2019-11-11	clk: tegra: clk-dfll: Add suspend and resume support	Sowjanya Komatineni
2019-11-11	clk: tegra: clk-super: Add restore-context support	Sowjanya Komatineni
2019-11-11	clk: tegra: clk-super: Fix to enable PLLP branches to CPU	Sowjanya Komatineni
2019-11-11	clk: tegra: periph: Add restore_context support	Sowjanya Komatineni
2019-11-11	clk: tegra: Support for OSC context save and restore	Sowjanya Komatineni
2019-11-11	clk: tegra: pll: Save and restore pll context	Sowjanya Komatineni
2019-11-11	clk: tegra: pllout: Save and restore pllout context	Sowjanya Komatineni
2019-11-11	clk: tegra: divider: Save and restore divider rate	Sowjanya Komatineni
2019-11-11	clk: tegra: Reimplement SOR clocks on Tegra210	Thierry Reding
2019-11-11	clk: tegra: Reimplement SOR clock on Tegra124	Thierry Reding
2019-11-11	clk: tegra: Rename sor0_lvds to sor0_out	Thierry Reding
2019-11-11	clk: tegra: Move SOR0 implementation to Tegra124	Thierry Reding
2019-11-11	clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC	Thierry Reding