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path: root/drivers/clk
AgeCommit message (Expand)Author
2019-12-13clk: renesas: rcar-gen3: Set state when registering SD clocksNiklas Söderlund
2019-12-13clk: qcom: gcc-msm8998: Disable halt check of UFS clocksBjorn Andersson
2019-12-13clk: renesas: r8a77995: Correct parent clock of DUGeert Uytterhoeven
2019-12-13clk: renesas: r8a77990: Correct parent clock of DUTakeshi Kihara
2019-12-13clk: qcom: Fix MSM8998 resetsJeffrey Hugo
2019-12-13clk: sunxi-ng: h3/h5: Fix CSI_MCLK parentChen-Yu Tsai
2019-12-13clk: meson: meson8b: fix the offset of vid_pll_dco's N valueMartin Blumenstingl
2019-12-13clk: mediatek: Drop more __init markings for driver probeStephen Boyd
2019-12-13clk: mediatek: Drop __init from mtk_clk_register_cpumuxes()Stephen Boyd
2019-12-13clk: meson: Fix GXL HDMI PLL fractional bits widthNeil Armstrong
2019-12-13clk: rockchip: fix I2S1 clock gate register for rk3328Katsuhiro Suzuki
2019-12-13clk: rockchip: fix rk3188 sclk_mac_lbtest parameter orderingHeiko Stuebner
2019-12-13clk: rockchip: fix rk3188 sclk_smc gate dataFinley Xiao
2019-12-13clk: sunxi-ng: a64: Fix gate bit of DSI DPHYJagan Teki
2019-12-05clk: stm32mp1: parent clocks updateGabriel Fernandez
2019-12-05clk: stm32mp1: add CLK_SET_RATE_NO_REPARENT to Kernel clocksGabriel Fernandez
2019-12-05clk: stm32mp1: fix mcu divider tableGabriel Fernandez
2019-12-05clk: stm32mp1: fix HSI divider flagGabriel Fernandez
2019-12-05clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated()Alexandre Belloni
2019-12-05clk: at91: fix update bit maps on CFG_MOR writeEugen Hristev
2019-12-05clk: ti: clkctrl: Fix failed to enable error with double udelay timeoutTony Lindgren
2019-12-05clk: ti: dra7-atl-clock: Remove ti_clk_add_alias callPeter Ujfalusi
2019-12-05clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18Colin Ian King
2019-12-05clk: sunxi: Fix operator precedence in sunxi_divs_clk_setupNathan Chancellor
2019-12-05clk: at91: avoid sleeping earlyAlexandre Belloni
2019-12-05clk: samsung: exynos5420: Preserve PLL configuration during suspend/resumeMarek Szyprowski
2019-12-05clk: samsung: exynos5433: Fix error pathsMarek Szyprowski
2019-12-05clk: meson: gxbb: let sar_adc_clk_div set the parent clock rateMartin Blumenstingl
2019-12-01clk: tegra20: Turn EMC clock gate into dividerDmitry Osipenko
2019-12-01clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clockIcenowy Zheng
2019-12-01clk: at91: audio-pll: fix audio pmc typeAlexandre Belloni
2019-12-01clk: mmp2: fix the clock id for sdh2_clk and sdh3_clkLubomir Rintel
2019-12-01clk: tegra: Fixes for MBIST work aroundJoseph Lo
2019-11-24clk: samsung: Use clk_hw API for calling clk framework from clk notifiersMarek Szyprowski
2019-11-24clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420Joonyoung Shim
2019-11-24clk: samsung: Use NOIRQ stage for Exynos5433 clocks suspend/resumeMarek Szyprowski
2019-11-24clk: keystone: Enable TISCI clocks if K3_ARCHNishanth Menon
2019-11-20clk: sunxi-ng: h6: fix PWM gate/reset offsetRongyi Chen
2019-11-06clk: boston: unregister clks on failure in clk_boston_setup()Yi Wang
2019-10-07clk: sprd: add missing kfreeChunyan Zhang
2019-10-07clk: at91: select parent if main oscillator or bypass is enabledEugen Hristev
2019-10-07clk: qcom: gcc-sdm845: Use floor ops for sdcc clksStephen Boyd
2019-10-07clk: renesas: cpg-mssr: Set GENPD_FLAG_ALWAYS_ON for clock domainGeert Uytterhoeven
2019-10-07clk: renesas: mstp: Set GENPD_FLAG_ALWAYS_ON for clock domainGeert Uytterhoeven
2019-10-07clk: zx296718: Don't reference clk_init_data after registrationStephen Boyd
2019-10-07clk: sprd: Don't reference clk_init_data after registrationStephen Boyd
2019-10-07clk: sirf: Don't reference clk_init_data after registrationStephen Boyd
2019-10-07clk: actions: Don't reference clk_init_data after registrationStephen Boyd
2019-10-07clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocksIcenowy Zheng
2019-10-07clk: qoriq: Fix -Wunused-const-variableNathan Huckleberry