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Linux Kernel
Sven Wegener
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path:
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drivers
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clk
Age
Commit message (
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)
Author
2018-04-24
clk: bcm2835: De-assert/assert PLL reset signal when appropriate
Boris Brezillon
2018-04-24
clk: fix false-positive Wmaybe-uninitialized warning
Arnd Bergmann
2018-04-24
clk: mvebu: armada-38x: add support for missing clocks
Richard Genoud
2018-04-24
clk: mvebu: armada-38x: add support for 1866MHz variants
Ralph Sennhauser
2018-04-13
clk: at91: fix clk-generated compilation
Alexandre Belloni
2018-04-13
clk: meson: meson8b: add compatibles for Meson8 and Meson8m2
Martin Blumenstingl
2018-04-13
clk: Fix __set_clk_rates error print-string
Bryan O'Donoghue
2018-04-13
clk: scpi: fix return type of __scpi_dvfs_round_rate
Sudeep Holla
2018-04-13
clk: at91: fix clk-generated parenting
Alexandre Belloni
2018-04-13
clk: renesas: rcar-gen2: Fix PLL0 on R-Car V2H and E2
Geert Uytterhoeven
2018-03-28
clk: sunxi-ng: a31: Fix CLK_OUT_* clock ops
Chen-Yu Tsai
2018-03-28
clk: bcm2835: Protect sections updating shared registers
Boris Brezillon
2018-03-28
clk: bcm2835: Fix ana->maskX definitions
Boris Brezillon
2018-03-24
clk: migrate the count of orphaned clocks at init
Jerome Brunet
2018-03-24
clk: si5351: Rename internal plls to avoid name collisions
Sergej Sawazki
2018-03-24
clk: axi-clkgen: Correctly handle nocount bit in recalc_rate()
Lars-Peter Clausen
2018-03-24
clk: Don't touch hardware when reparenting during registration
Stephen Boyd
2018-03-24
clk: ns2: Correct SDIO bits
Bharat Kumar Reddy Gooty
2018-03-22
clk: qcom: msm8916: fix mnd_width for codec_digcodec
Srinivas Kandagatla
2018-03-22
clk: meson: gxbb: fix wrong clock for SARADC/SANA
Yixun Lan
2018-03-22
clk: qcom: msm8996: Fix the vfe1 powerdomain name
Rajendra Nayak
2018-02-25
clk: meson: gxbb: fix build error without RESET_CONTROLLER
Tobias Regnery
2018-02-25
clk: sunxi-ng: fix build error without CONFIG_RESET_CONTROLLER
Tobias Regnery
2017-12-29
clk: sunxi: sun9i-mmc: Implement reset callback for reset controls
Chen-Yu Tsai
2017-12-25
clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collision
Chen-Yu Tsai
2017-12-20
clk: tegra: Fix cclk_lp divisor register
Michał Mirosław
2017-12-20
clk: hi6220: mark clock cs_atb_syspll as critical
Leo Yan
2017-12-20
clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPU
Sébastien Szymanski
2017-12-20
clk: mediatek: add the option for determining PLL source clock
Chen Zhong
2017-12-14
clk: uniphier: fix DAPLL2 clock rate of Pro5
Masahiro Yamada
2017-11-30
clk: qcom: ipq4019: Add all the frequencies for apss cpu
Abhishek Sahu
2017-11-30
clk: sunxi-ng: fix PLL_CPUX adjusting on A33
Icenowy Zheng
2017-11-30
clk: sunxi-ng: A31: Fix spdif clock register
Marcus Cooper
2017-11-30
clk: ti: dra7-atl-clock: fix child-node lookups
Johan Hovold
2017-11-15
clk: mvebu: adjust AP806 CPU clock frequencies to production chip
Thomas Petazzoni
2017-11-15
clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
Marek Szyprowski
2017-11-08
clk: sunxi-ng: Check kzalloc() for errors and cleanup error path
Stephen Boyd
2017-10-08
clk/axs10x: Clear init field in driver probe
Jose Abreu
2017-10-08
clk: sunxi-ng: fix PLL_CPUX adjusting on H3
Ondrej Jirman
2017-08-11
clk/samsung: exynos542x: mark some clocks as critical
Marek Szyprowski
2017-07-05
clk: scpi: don't add cpufreq device if the scpi dvfs node is disabled
Sudeep Holla
2017-06-29
clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset
Chen-Yu Tsai
2017-05-14
clk: rockchip: add "," to mux_pll_src_apll_dpll_gpll_usb480m_p on rk3036
Heiko Stuebner
2017-05-14
clk: Make x86/ conditional on CONFIG_COMMON_CLK
Pierre-Louis Bossart
2017-04-12
clk: lpc32xx: add a quirk for PWM and MS clock dividers
Vladimir Zapolskiy
2017-03-30
clk: sunxi-ng: mp: Adjust parent rate for pre-dividers
Chen-Yu Tsai
2017-03-30
clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clock
Chen-Yu Tsai
2017-03-22
clk: bcm2835: Fix ->fixed_divider of pllh_aux
Boris Brezillon
2017-01-15
ARM: 8631/1: clkdev: Detect errors in clk_hw_register_clkdev() for mass regis...
Geert Uytterhoeven
2017-01-12
clk: renesas: mstp: Support 8-bit registers for r7s72100
Chris Brandt
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