summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_ringbuffer.c
AgeCommit message (Expand)Author
2013-02-03drm/i915: GFX_MODE Flush TLB Invalidate Mode must be '1' for scanline waitsChris Wilson
2013-02-03drm/i915: Disable AsyncFlip performance optimisationsChris Wilson
2012-10-03Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds
2012-10-02UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/David Howells
2012-10-02UAPI: (Scripted) Remove redundant DRM UAPI header #inclusions from drivers/gpu/.David Howells
2012-09-20drm/i915: Replace the array of pages with a scatterlistChris Wilson
2012-09-03drm/i915: add workarounds to gen7_render_ring_flushPaulo Zanoni
2012-09-03drm/i915: add workarounds directly to gen6_render_ring_flushPaulo Zanoni
2012-09-03drm/i915: add gen7_render_ring_flushPaulo Zanoni
2012-08-24drm/i915: Only pwrite through the GTT if there is space in the apertureChris Wilson
2012-08-17Merge tag 'v3.6-rc2' into drm-intel-nextDaniel Vetter
2012-08-14drm/i915: Apply post-sync write for pipe control invalidatesChris Wilson
2012-08-10drm/i915: Lazily apply the SNB+ seqno w/aChris Wilson
2012-08-08drm/i915: correctly order the ring init sequenceDaniel Vetter
2012-08-08drm/i915: Only apply the SNB pipe control w/a to gen6Chris Wilson
2012-07-25drm/i915: Macro to determine DPF supportBen Widawsky
2012-07-25drm/i915: Split i915_gem_flush_ring() into seperate invalidate/flush funcsChris Wilson
2012-07-25drm/i915: Remove the per-ring write listChris Wilson
2012-07-20drm/i915: missing error case in init status pageBen Widawsky
2012-07-20drm/i915: Add comments to explain the BSD tail write workaroundChris Wilson
2012-07-05drm/i915: don't return a spurious -EIO from intel_ring_beginDaniel Vetter
2012-07-05drm/i915: non-interruptible sleeps can't handle -EAGAINDaniel Vetter
2012-06-28drm/i915: "Flush Me Harder" required on gen6+Daniel Vetter
2012-06-25Merge tag 'v3.5-rc4' into drm-intel-next-queuedDaniel Vetter
2012-06-14drm/i915: possibly invalidate TLB before context switchBen Widawsky
2012-06-14drm/i915: PIPE_CONTROL_TLB_INVALIDATEBen Widawsky
2012-06-12drm/i915: stop using dev->agp->baseDaniel Vetter
2012-06-04drm/i915: hold forcewake around ring hw initDaniel Vetter
2012-06-04drm/i915: Mark the ringbuffers as being in the GTT domainChris Wilson
2012-05-31drm/i915: enable parity error interruptsBen Widawsky
2012-05-29drm/i915: Reset last_retired_head when resetting ringChris Wilson
2012-05-25drm/i915: s/i915_wait_request/i915_wait_seqno/gBen Widawsky
2012-05-08Merge remote-tracking branch 'airlied/drm-core-next' into drm-intel-next-queuedDaniel Vetter
2012-05-07Merge tag 'v3.4-rc6' into drm-intel-nextDaniel Vetter
2012-05-05drm/i915: add interface to simulate gpu hangsDaniel Vetter
2012-05-03drm/i915: fixup __iomem mixups in ringbuffer.cDaniel Vetter
2012-05-03drm/i915: kill pointless clearing of dev_priv->hws_mapDaniel Vetter
2012-05-03drm/i915: remove do_retire from i915_wait_requestBen Widawsky
2012-05-03drm/i915: rip out GEM drm feature checksDaniel Vetter
2012-05-03drm/i915: Use a global lock for modifying global irq flagsChris Wilson
2012-05-03drm/i915: create macros to handle masked bitsDaniel Vetter
2012-05-03drm/i915: i8xx interrupt handlerChris Wilson
2012-04-28drm/i915: Set the Stencil Cache eviction policy to non-LRA mode.Kenneth Graunke
2012-04-20drm/i915: invalidate render cache on gen2Daniel Vetter
2012-04-18drm/i915: Don't set a MBZ bit in gen2/3 MI_FLUSHChris Wilson
2012-04-18drm/i915: Replace open coded MI_BATCH_GTTChris Wilson
2012-04-18drm/i915: [sparse] trivial sparse fixesBen Widawsky
2012-04-17Merge tag 'v3.4-rc3' into drm-intel-next-queuedDaniel Vetter
2012-04-13drm/i915: inline enable/disable_irq into ring->get/put_irqDaniel Vetter
2012-04-13drm/i915: don't set up gem ring functions on gen5 for !kmsDaniel Vetter
generated by cgit v1.2.3 (git 2.46.0) at 2026-02-21 04:04:30 +0000