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path: root/drivers/pinctrl/nuvoton
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2025-11-24pinctrl: ma35: Convert to common field_{get,prep}() helpersGeert Uytterhoeven
Drop the driver-specific field_get() and field_prep() macros, in favor of the globally available variants from <linux/bitfield.h>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-11-24pinctrl: ma35: #undef field_{get,prep}() before local definitionGeert Uytterhoeven
Prepare for the advent of globally available common field_get() and field_prep() macros by undefining the symbols before defining local variants. This prevents redefinition warnings from the C preprocessor when introducing the common macros later. Suggested-by: Yury Norov <yury.norov@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-10-01Merge tag 'pinctrl-v6.18-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "We have GPIO awareness in the pin control core and an interesting AAEON driver. Core changes: - Allow pins to be identified/marked as GPIO mode with a special callback. The pin controller core is now "aware" if a pin is in GPIO mode if the callback is implemented in the driver, and can thus be marked as "strict", i.e. disallowing simultaneous use of a line as GPIO and another function such as I2C. This is enabled in the Qualcomm TLMM driver and also implemeted from day 1 in the new Broadcom STB driver - Rename the pin config option PIN_CONFIG_OUTPUT to PIN_CONFIG_LEVEL to better describe what the config is doing, as well as making it more intuitive what shall be returned when reading this property New drivers: - Qualcomm SDM660 LPASS LPI TLMM pin controller subdriver - Qualcomm Glymur family pin controller driver - Broadcom STB family pin controller driver - Tegra186 pin controller driver - AAEON UP pin controller support. This is some special pin controller that works as an external advanced line MUX and amplifier for signals from an Intel SoC. A cooperative effort with the GPIO maintainer was needed to reach a solution where we reuse code from the GPIO aggregator/forwarder driver - Renesas RZ/T2H and RZ/N2H pin controller support - Axis ARTPEC-8 subdriver for the Samsung pin controller driver Improvements: - Output enable (OEN) support in the Renesas RZG2L driver - Properly support bias pull up/down in the pinctrl-single driver - Move over all GPIO portions using generic MMIO GPIO to the new generic GPIO chip management which has a nice and separate API - Proper DT bindings for some older Broadcom SoCs - External GPIO (EGPIO) support in the Qualcomm SM8250 Deleted code: - Dropped the now unused Samsung S3C24xx drivers" * tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: use more common syntax for compound literals pinctrl: Simplify printks with pOF format pinctrl: qcom: Add SDM660 LPASS LPI TLMM dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl pinctrl: qcom: lpass-lpi: Add ability to use custom pin offsets pinctrl: qcom: Add glymur pinctrl driver dt-bindings: pinctrl: qcom: Add Glymur pinctrl pinctrl: qcom: sm8250: Add egpio support pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL pinctrl: keembay: fix double free in keembay_build_functions() pinctrl: spacemit: fix typo in PRI_TDI pin name pinctrl: eswin: Fix regulator error check and Kconfig dependency pinctrl: bcm: Add STB family pin controller driver dt-bindings: pinctrl: Add support for Broadcom STB pin controller pinctrl: qcom: make the pinmuxing strict pinctrl: qcom: mark the `gpio` and `egpio` pins function as non-strict functions pinctrl: qcom: add infrastructure for marking pin functions as GPIOs pinctrl: allow to mark pin functions as requestable GPIOs pinctrl: qcom: use generic pin function helpers pinctrl: make struct pinfunction a pointer in struct function_desc ...
2025-09-24gpio: generic: rename BGPIOF_ flags to GPIO_GENERIC_Bartosz Golaszewski
Make the flags passed to gpio_generic_chip_init() use the same prefix as the rest of the modernized generic GPIO chip API. Link: https://lore.kernel.org/r/20250917-gpio-generic-flags-v1-1-69f51fee8c89@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-24pinctrl: use more common syntax for compound literalsBartosz Golaszewski
The (typeof(foo)) construct is unusual in the kernel, use a more typical syntax by explicitly spelling out the type. Link: https://lore.kernel.org/all/20250909-gpio-mmio-gpio-conv-part4-v1-13-9f723dc3524a@linaro.org/ Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-09-08pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVELLinus Walleij
This generic pin config property is confusingly named so let's rename it to make things clearer. There are already drivers in the tree that use PIN_CONFIG_OUTPUT to *read* the value of an output driven pin, which is a big semantic confusion for the head: are we then reading the setting of the output or the actual value/level that is put out on the pin? We already have PIN_CONFIG_OUTPUT_ENABLE that turns on driver buffers for output, so this can by logical conclusion only drive the voltage level if it should be any different. But if we read the pin, are we then reading the *setting* of the output value or the *actual* value we can see on the line? If the pin has not first been set into output mode with PIN_CONFIG_OUTPUT_ENABLE, but is instead in some input mode or tristate, what will reading this property actually return? Reading the current users reading this property it is clear that what we read is the logical level of the pin as 0 or 1 depending on if it is low or high. Rename it to PIN_CONFIG_LEVEL so it is crystal clear that we set or read the voltage level of the pin and nothing else. Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-09-08pinctrl: ma35: Use int type to store negative error codesQianfeng Rong
Change the 'ret' variable in ma35_pinctrl_parse_functions() from u32 to int, as it needs to store either negative error codes or zero returned by ma35_pinctrl_parse_groups(). No effect on runtime. Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-19pinctrl: wpcm450: use new generic GPIO chip APIBartosz Golaszewski
Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250811-gpio-mmio-pinctrl-conv-v1-5-a84c5da2be20@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-19pinctrl: npcm7xx: use new generic GPIO chip APIBartosz Golaszewski
Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250811-gpio-mmio-pinctrl-conv-v1-4-a84c5da2be20@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-19pinctrl: npcm8xx: use new generic GPIO chip APIBartosz Golaszewski
Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250811-gpio-mmio-pinctrl-conv-v1-3-a84c5da2be20@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-07treewide: rename GPIO set callbacks back to their original namesBartosz Golaszewski
The conversion of all GPIO drivers to using the .set_rv() and .set_multiple_rv() callbacks from struct gpio_chip (which - unlike their predecessors - return an integer and allow the controller drivers to indicate failures to users) is now complete and the legacy ones have been removed. Rename the new callbacks back to their original names in one sweeping change. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-08-02Merge tag 'pinctrl-v6.17-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Nothing stands out, apart from maybe the interesting Eswin EIC7700, a RISC-V SoC I've never seen before. Core changes: - Open code PINCTRL_FUNCTION_DESC() instead of defining a complex macro only used in one place - Add pinmux_generic_add_pinfunction() helper and use this in a few drivers New drivers: - Amlogic S7, S7D and S6 pin control support - Eswin EIC7700 pin control support - Qualcomm PMIV0104, PM7550 and Milos pin control support Because of unhelpful numbering schemes, the Qualcomm driver now needs to start to rely on SoC codenames - STM32 HDP pin control support - Mediatek MT8189 pin control support Improvements: - Switch remaining pin control drivers over to the new GPIO set callback that provides a return value - Support RSVD (reserved) pins in the STM32 driver - Move many fixed assignments over to pinctrl_desc definitions - Handle multiple TLMM regions in the Qualcomm driver" * tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (105 commits) pinctrl: mediatek: Add pinctrl driver for mt8189 dt-bindings: pinctrl: mediatek: Add support for mt8189 pinctrl: aspeed-g6: Add PCIe RC PERST pin group pinctrl: ingenic: use pinmux_generic_add_pinfunction() pinctrl: keembay: use pinmux_generic_add_pinfunction() pinctrl: mediatek: moore: use pinmux_generic_add_pinfunction() pinctrl: airoha: use pinmux_generic_add_pinfunction() pinctrl: equilibrium: use pinmux_generic_add_pinfunction() pinctrl: provide pinmux_generic_add_pinfunction() pinctrl: pinmux: open-code PINCTRL_FUNCTION_DESC() pinctrl: ma35: use new GPIO line value setter callbacks MAINTAINERS: add Clément Le Goffic as STM32 HDP maintainer pinctrl: stm32: Introduce HDP driver dt-bindings: pinctrl: stm32: Introduce HDP pinctrl: qcom: Add Milos pinctrl driver dt-bindings: pinctrl: document the Milos Top Level Mode Multiplexer pinctrl: qcom: spmi: Add PM7550 dt-bindings: pinctrl: qcom,pmic-gpio: Add PM7550 support pinctrl: qcom: spmi: Add PMIV0104 dt-bindings: pinctrl: qcom,pmic-gpio: Add PMIV0104 support ...
2025-07-19pinctrl: ma35: use new GPIO line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250717125758.53141-1-brgl@bgdev.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-06-18pinctrl: nuvoton: Fix boot on ma35dx platformsMiquel Raynal
As part of a wider cleanup trying to get rid of OF specific APIs, an incorrect (and partially unrelated) cleanup was introduced. The goal was to replace a device_for_each_chil_node() loop including an additional condition inside by a macro doing both the loop and the check on a single line. The snippet: device_for_each_child_node(dev, child) if (fwnode_property_present(child, "gpio-controller")) continue; was replaced by: for_each_gpiochip_node(dev, child) which expands into: device_for_each_child_node(dev, child) for_each_if(fwnode_property_present(child, "gpio-controller")) This change is actually doing the opposite of what was initially expected, breaking the probe of this driver, breaking at the same time the whole boot of Nuvoton platforms (no more console, the kernel WARN()). Revert these two changes to roll back to the correct behavior. Fixes: 693c9ecd8326 ("pinctrl: nuvoton: Reduce use of OF-specific APIs") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/20250613181312.1269794-1-miquel.raynal@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-06-18pinctrl: nuvoton: Constify static 'pinctrl_desc'Krzysztof Kozlowski
The local static 'struct pinctrl_desc' is not modified, so can be made const for code safety. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: J. Neuschäfer <j.ne@posteo.net> Link: https://lore.kernel.org/20250611-pinctrl-const-desc-v2-6-b11c1d650384@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-29Merge tag 'pinctrl-v6.15-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Core changes: - None really. New drivers: - AMD ISP411 "AMD ISP" driver - Exynos 2200 and 7870 SoC subdrivers - Sophgo RISC-V SG2042 and SG2044 subdrivers - Amlogic A4 subdriver - Rockchip RK3528 subdriver - Broadcom BCM21664 subdriver - Allwinner A523/T527 subdriver - Ingenic X1600 subdriver - Microchip SAMA7D65 subdriver, essentially a re-branded Atmel AT91 PIO4 driver, but nowadays a Microschip SoC line Improvements: - Bring in the devm_kmemdup_array() helper and use it throughout, also bring in changes to other subsystems for this to establish this helper - Support EGPIO on the Qualcomm SA8775P SoC - Extend EINT support in the Mediatek driver" * tag 'pinctrl-v6.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (101 commits) pinctrl: mediatek: Add EINT support for multiple addresses pinctrl: amlogic-a4: Drop surplus semicolon pinctrl: nuvoton: Reduce use of OF-specific APIs pinctrl: nuvoton: Convert to use struct group_desc pinctrl: nuvoton: Make use of struct pinfunction and PINCTRL_PINFUNCTION() pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP() pinctrl: npcm8xx: Fix incorrect struct npcm8xx_pincfg assignment pinctrl: tegra: Fix off by one in tegra_pinctrl_get_group() pinctrl: PINCTRL_AMDISP should depend on DRM_AMD_ISP pinctrl: qcom: sa8775p: Enable egpio function dt-bindings: pinctrl: qcom: Add egpio function for sa8775p pinctrl: qcom: tlmm-test: Validate irq_enable delivers edge irqs pinctrl: qcom: Clear latched interrupt status when changing IRQ type dt-bindings: pinctrl: airoha: Add missing gpio-ranges property pinctrl: bcm281xx: Add missing assignment in bcm21664_pinctrl_lock_all() pinctrl: amd: isp411: Fix IS_ERR() vs NULL check in probe() dt-bindings: pinctrl: at91-pio4: add microchip,sama7d65-pinctrl pinctrl: tegra: Set SFIO mode to Mux Register pinctrl-tegra: Restore SFSEL bit when freeing pins pinctrl: tegra: Add descriptions for SoC data fields ...
2025-03-20pinctrl: nuvoton: Reduce use of OF-specific APIsAndy Shevchenko
Some drivers are using device property APIs along with OF-specific ones. At the same time few of the latter can be converted to device property calls. Reduce use of OF-specific APIs in order to bring a bit more consistency into the drivers. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250318105932.2090926-6-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20pinctrl: nuvoton: Convert to use struct group_descAndy Shevchenko
The pin control core header provides struct group_desc. Utilize it instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250318105932.2090926-5-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20pinctrl: nuvoton: Make use of struct pinfunction and PINCTRL_PINFUNCTION()Andy Shevchenko
Since pin control provides a generic data type and a macro for the pin function definition, use them in the driver. Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250318105932.2090926-4-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP()Andy Shevchenko
The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro. Utilize them instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250318105932.2090926-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20pinctrl: npcm8xx: Fix incorrect struct npcm8xx_pincfg assignmentAndy Shevchenko
Sparse is not happy about implementation of the NPCM8XX_PINCFG() pinctrl-npcm8xx.c:1314:9: warning: obsolete array initializer, use C99 syntax pinctrl-npcm8xx.c:1315:9: warning: obsolete array initializer, use C99 syntax ... pinctrl-npcm8xx.c:1412:9: warning: obsolete array initializer, use C99 syntax pinctrl-npcm8xx.c:1413:9: warning: too many warnings which uses index-based assignment in a wrong way, i.e. it missed the equal sign and hence the index is simply ignored, while the entries are indexed naturally. This is not a problem as the pin numbering repeats the natural order, but it might be in case of shuffling the entries. Fix this by adding missed equal sign and reformat a bit for better readability. Fixes: acf4884a5717 ("pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250318105932.2090926-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-28pinctrl: wpcm450: Switch to use for_each_gpiochip_node() helperAndy Shevchenko
Switch the code to use for_each_gpiochip_node() helper. While at it, correct header inclusion as device property APIs are provided in property.h. Reviewed-by: J. Neuschäfer <j.ne@posteo.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250220155036.2734838-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-25pinctrl: nuvoton: npcm8xx: Add NULL check in npcm8xx_gpio_fwCharles Han
devm_kasprintf() calls can return null pointers on failure. But the return values were not checked in npcm8xx_gpio_fw(). Add NULL check in npcm8xx_gpio_fw(), to handle kernel NULL pointer dereference error. Fixes: acf4884a5717 ("pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver") Signed-off-by: Charles Han <hanchunchao@inspur.com> Link: https://lore.kernel.org/20250212100532.4317-1-hanchunchao@inspur.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-17pinctrl: nuvoton: npcm8xx: Fix error handling in npcm8xx_gpio_fw()Yue Haibing
fwnode_irq_get() was changed to not return 0, fix this by checking for negative error, also update the error log. Fixes: acf4884a5717 ("pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver") Signed-off-by: Yue Haibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/20250118031334.243324-1-yuehaibing@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-11pinctrl: nuvoton: fix a double free in ma35_pinctrl_dt_node_to_map_func()Harshit Mogalapalli
'new_map' is allocated using devm_* which takes care of freeing the allocated data on device removal, call to .dt_free_map = pinconf_generic_dt_free_map double frees the map as pinconf_generic_dt_free_map() calls pinctrl_utils_free_map(). Fix this by using kcalloc() instead of auto-managed devm_kcalloc(). Cc: stable@vger.kernel.org Fixes: f805e356313b ("pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver") Reported-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com> Link: https://lore.kernel.org/20241010205237.1245318-1-harshit.m.mogalapalli@oracle.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: modify pins flagsTomer Maimon
Modify the following pins flags on the Nuvoton NPCM8XX BMC: - Add pins 110-113, 187, 191, 192, 194-199, 202 SLEW flag - Add pins 229 and 230 GPO flag. - Remove pin 233 SLEWLPC flag. - Remove pin 251 SLEW flag. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-8-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configurationTomer Maimon
Modify clkrun and serirq pin configuration on the Nuvoton NPCM8XX BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-7-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins groupTomer Maimon
Add pin 250 to DDR pins group on the Nuvoton NPCM8xx BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-6-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36Tomer Maimon
This patch adds support for GPIO pins GPI35 and GPI36 on the Nuvoton NPCM8xx BMC SoC. The pins are configured for only for input. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-5-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: clear polarity before set both edgeTomer Maimon
Clear polarity before setting both edges to ensure that the polarity is in the same state before configuring events for both edges Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-4-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: remove non-existent pins, groups, functionsTomer Maimon
Remove non-existent smb4den abd lpcclk pins, groups and functions on the Nuvoton NPCM8XX BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-3-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: nuvoton: ma35d1: Fix an IS_ERR() vs NULL checkDan Carpenter
The fwnode_iomap() function doesn't return error pointers, it returns NULL. It's the same as of_iomap() in that way. Update the check accordingly. Fixes: ecc5bf868673 ("pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/840152f9-d3bb-410e-8164-4c5043e1983e@moroto.mountain Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driverJacky Huang
Add common pinctrl and GPIO driver for Nuvoton MA35 series SoC, and add support for ma35d1 pinctrl. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Link: https://lore.kernel.org/r/20240521012447.42211-4-ychuang570808@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-07pinctrl: nuvoton: Constify wpcm450_groupsAndy Shevchenko
There is no modifications are assumed for wpcm450_groups. Constify it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231211154239.4190429-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP()Andy Shevchenko
The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro. Utilize them instead of open coded variants in the driver. Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231204160033.1872569-6-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24pinctrl: npcm7xx: prevent glitch when setting the GPIO to output highTomer Maimon
Enable GPIO output after setting the output value to prevent a glitch when pinctrl driver sets gpio pin to output high and the pin is in the default state (high->low->high). Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: William A. Kennington III <william@wkennington.com> Link: https://lore.kernel.org/r/20231115211209.1683449-1-william@wkennington.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04pinctrl: nuvoton: npcm8xx: drop wrappers around pinctrl_gpio_request/free()Bartosz Golaszewski
pinctrl_gpio_*() helpers now have signatures corresponding with those of the GPIOLIB callbacks. We can drop the wrappers. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04pinctrl: nuvoton: npcm7xx: drop wrappers around pinctrl_gpio_request/free()Bartosz Golaszewski
pinctrl_gpio_*() helpers now have signatures corresponding with those of the GPIOLIB callbacks. We can drop the wrappers. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04treewide: rename pinctrl_gpio_direction_output_new()Bartosz Golaszewski
Now that pinctrl_gpio_direction_output() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04treewide: rename pinctrl_gpio_direction_input_new()Bartosz Golaszewski
Now that pinctrl_gpio_direction_input() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04treewide: rename pinctrl_gpio_free_new()Bartosz Golaszewski
Now that pinctrl_gpio_free()() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04treewide: rename pinctrl_gpio_request_new()Bartosz Golaszewski
Now that pinctrl_gpio_request() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04pinctrl: nuvoton: npcm8xx: use new pinctrl GPIO helpersBartosz Golaszewski
Replace the pinctrl helpers taking the global GPIO number as argument with the improved variants that instead take a pointer to the GPIO chip and the controller-relative offset. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04pinctrl: nuvoton: npcm7xx: use new pinctrl GPIO helpersBartosz Golaszewski
Replace the pinctrl helpers taking the global GPIO number as argument with the improved variants that instead take a pointer to the GPIO chip and the controller-relative offset. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-03Merge tag 'pinctrl-v6.7-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No pin control core changes this time. New drivers: - Realtek RTD family pin control driver and RTD1619B, RTD1319D and RTD1315E subdrivers - Nuvoton NPCM8xx combined pin control and GPIO driver - Amlogic T7 pin control driver - Renesas RZ/G3S pin control driver Improvements: - A number of additional UART groups added to the Mediatek MT7981 driver - MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125 and SDM660 - Extra GPIO banks for the Sunxi H616 - MLSP I2C6 function support in Qualcomm MSM8226 - Some __counted_by() annotations for dynamic arrays - Ongoing work to make remove() return void - LSBC groups and functions in the Renesas R8A7778" * tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (110 commits) pinctrl: Use device_get_match_data() dt-bindings: pinctrl: qcom,sa8775p-tlmm: add missing wakeup-parent dt-bindings: pinctrl: nuvoton,npcm845: Add missing additionalProperties on gpio child nodes dt-bindings: pinctrl: brcm: Ensure all child node properties are documented pinctrl: renesas: rzn1: Convert to platform remove callback returning void pinctrl: renesas: rzg2l: Add RZ/G3S support dt-bindings: pinctrl: renesas: Document RZ/G3S SoC pinctrl: renesas: rzg2l: Add support for different DS values on different groups pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets pinctrl: renesas: rzg2l: Index all registers based on port offset pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request() pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions pinctrl: intel: fetch community only when we need it pinctrl: cherryview: reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case pinctrl: cherryview: Convert to platform remove callback returning void pinctrl: sprd-sc9860: Convert to platform remove callback returning void pinctrl: qcom/msm: Convert to platform remove callback returning void pinctrl: qcom/lpi: Convert to platform remove callback returning void ...
2023-09-13pinctrl: nuvoton: Fix up Kconfig depsLinus Walleij
We have build errors due to missing dependency on OF. Add the dependency and do it the same way for all three Nuvotons while we are at it. Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230913-novoton-kconfig-v1-1-1c2dff14c0d2@linaro.org
2023-09-12pinctrl: nuvoton: wpcm450: fix out of bounds writeMikhail Kobuk
Write into 'pctrl->gpio_bank' happens before the check for GPIO index validity, so out of bounds write may happen. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: a1d1e0e3d80a ("pinctrl: nuvoton: Add driver for WPCM450") Signed-off-by: Mikhail Kobuk <m.kobuk@ispras.ru> Reviewed-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20230825101532.6624-1-m.kobuk@ispras.ru Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-11pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driverTomer Maimon
Add pinctrl and GPIO controller driver support to Arbel BMC NPCM8XX SoC. Arbel BMC NPCM8XX pinctrl driver based on Poleg NPCM7XX, except the pin mux mapping difference the NPCM8XX GPIO supports adjust debounce period time. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/r/20230828140849.21724-3-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-11pinctrl: nuvoton: Use pinconf_generic_dt_node_to_map_all()Geert Uytterhoeven
Use the pinconf_generic_dt_node_to_map_all() helper instead of open-coding the same operation, to avoid having to provide custom pinctrl_ops.dt_node_to_map() callbacks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/81e9ab48f78d63153b23a163b3349b3059d2b7fc.1692871558.git.geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09pinctrl: npcm7xx: Add missing check for ioremapJiasheng Jiang
Add check for ioremap() and return the error if it fails in order to guarantee the success of ioremap(). Fixes: 3b588e43ee5c ("pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driver") Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20230607095829.1345-1-jiasheng@iscas.ac.cn Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.46.0) at 2025-12-30 17:14:45 +0000