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path: root/include/asm-mips/mach-mips
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2008-07-15[MIPS] Malta: Cleanup organization of code into directories.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Split up war.hRalf Baechle
It was getting a little big, ugly and a primary source for merge conflicts. Also the old method was a bit too forgiving in that the workaround did default to off, so now there is an explicit #error forcing platform maintainers to think if they should enable a workaround for a particular platform. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] GT64120: Remove unused definitionsYoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] Early check for SMTC kernel on non-MT processorChris Dearman
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-04[MIPS] SNI: Fix mc146818_decode_yearThomas Bogendoerfer
Big endian RMs uses a different mc146818_decode_year than little endian RMs Correct mc146818_decode_year for years before 2000 Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06[MIPS] Define MIPS_CPU_IRQ_BASE in generic headerAtsushi Nemoto
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13[MIPS] Use the proper technical term for naming some of the cache macros.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29[PATCH] genirq: cleanup: turn ARCH_HAS_IRQ_PER_CPU into CONFIG_IRQ_PER_CPUIngo Molnar
Cleanup: change ARCH_HAS_IRQ_PER_CPU into a Kconfig method. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-20Merge git://git.infradead.org/hdrcleanup-2.6Linus Torvalds
* git://git.infradead.org/hdrcleanup-2.6: (63 commits) [S390] __FD_foo definitions. Switch to __s32 types in joystick.h instead of C99 types for consistency. Add <sys/types.h> to headers included for userspace in <linux/input.h> Move inclusion of <linux/compat.h> out of user scope in asm-x86_64/mtrr.h Remove struct fddi_statistics from user view in <linux/if_fddi.h> Move user-visible parts of drivers/s390/crypto/z90crypt.h to include/asm-s390 Revert include/media changes: Mauro says those ioctls are only used in-kernel(!) Include <linux/types.h> and use __uXX types in <linux/cramfs_fs.h> Use __uXX types in <linux/i2o_dev.h>, include <linux/ioctl.h> too Remove private struct dx_hash_info from public view in <linux/ext3_fs.h> Include <linux/types.h> and use __uXX types in <linux/affs_hardblocks.h> Use __uXX types in <linux/divert.h> for struct divert_blk et al. Use __u32 for elf_addr_t in <asm-powerpc/elf.h>, not u32. It's user-visible. Remove PPP_FCS from user view in <linux/ppp_defs.h>, remove __P mess entirely Use __uXX types in user-visible structures in <linux/nbd.h> Don't use 'u32' in user-visible struct ip_conntrack_old_tuple. Use __uXX types for S390 DASD volume label definitions which are user-visible S390 BIODASDREADCMB ioctl should use __u64 not u64 type. Remove unneeded inclusion of <linux/time.h> from <linux/ufs_fs.h> Fix private integer types used in V4L2 ioctls. ... Manually resolve conflict in include/linux/mtd/physmap.h
2006-06-19[MIPS] Make timer interrupt frequency configurable from kconfig.Atsushi Nemoto
Make HZ configurable. DECSTATION can select 128/256/1024 HZ, JAZZ can only select 100 HZ, others can select 100/128/250/256/1000/1024 HZ if not explicitly specified). Also remove all mach-xxx/param.h files and update all defconfigs according to current HZ value. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19[MIPS] Fix R4K cache macro namesKumba
Several machines have the R4K cache macro name spelled incorrectly. Namely, they have cpu_has_4kcache defined instead of cpu_has_4k_cache. Signed-off-by: Joshua Kinard <kumba@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-26Don't include linux/config.h from anywhere else in include/David Woodhouse
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2006-04-19[MIPS] MIPS boards: Set HZ to 100.Ralf Baechle
1000Hz will bring an FPGA CPU down on it's knees and it's even worse on multithreaded cores. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-20[PATCH] USB: EHCI for AU1200Jordan Crouse
ALCHEMY: Add EHCI support for AU1200 Updated by removing the OHCI support Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-10-29Fixup a few lose ends in explicit support for MIPS R1/R2.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Cleanup the mess in cpu_cache_init.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29SMP on Malta needs to define ARCH_HAS_IRQ_PER_CPU since 2.6.14-rc1.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-mips/irq.h new file mode 100644
2005-10-29Define cpu_icache_snoops_remote_store. This is slight abuse of somethingRalf Baechle
which originally was meant for SMP cache managment but it can be argued to apply on the 34K as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-02-01[PATCH] mips: mIPS Technologies board updatesRalf Bächle
Update the code for the three MIPS Technologies evaluation platforms. Untangle the support for the three platforms, keep up with changes elsewhere in the kernel and getting Atlas back to work even with the most esotheric configurations. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2004-12-01[PATCH] MIPS updatesRalf Bächle
o General updates of MIPS to 2.6.10-rc2 o Remove the Baget platform due to lack of maintenance over several years. Some of the drivers remain and will be removed in a separate patch. o Remove the HP Laserjet platform. No user reports ever and no patches from the original submitters made this port a neat hack - and a directory full of clutter. o SMP support for the PMC-Sierra. Signed-Off-By: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2004-04-19[PATCH] MIPS updateAndrew Morton
From: Ralf Baechle <ralf@linux-mips.org> - more work on resurrecting AMD Alchemy platforms - cleanup of unnecessary <asm/pgalloc.h> inclusions - update default config files - cleanup 32-bit compat ioctl code - support for Montum Jaguar ATX - workarounds for early revs of the RM9000 - fixes for RM5000 and RM7000 cache handling - add support for PMC-Sierra Yosemite eval board - further cleanup and bugfixes for SGI IP27 - make LASAT and VR41xx build and work in 2.6 - improved SGI IP32 support - plenty of small fixes
2004-02-20[PATCH] MIPS mega-patchAndrew Morton
From: Ralf Baechle <ralf@linux-mips.org> Below following 125547 lines of patches, all to arch/mips and include/asm-mips. I'm going to send the remaining stuff of which the one or other bit may need to be discussed in smaller bits.
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