1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
|
/**** vi:set ts=8 sts=8 sw=8:************************************************
*
* Copyright (C) 2002 Marcin Dalecki <martin@dalecki.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
/*
* Common low leved device access code. This is the lowest layer of hardware
* access.
*
* This is the place where register set access portability will be handled in
* the future.
*/
#include <linux/module.h>
#include <linux/types.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/ioport.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/bitops.h>
#include <asm/uaccess.h>
/*
* Select a device for operation with possible busy waiting for the operation
* to complete.
*/
void ata_select(struct ata_device *drive, unsigned long delay)
{
struct ata_channel *ch = drive->channel;
if (!ch)
return;
if (ch->selectproc)
ch->selectproc(drive);
OUT_BYTE(drive->select.all, ch->io_ports[IDE_SELECT_OFFSET]);
/* The delays during probing for drives can be georgeous. Deal with
* it.
*/
if (delay) {
if (delay >= 1000)
mdelay(delay / 1000);
else
udelay(delay);
}
}
EXPORT_SYMBOL(ata_select);
/*
* Handle quirky routing of interrupts.
*/
void ata_mask(struct ata_device *drive)
{
struct ata_channel *ch = drive->channel;
if (!ch)
return;
if (ch->maskproc)
ch->maskproc(drive);
}
EXPORT_SYMBOL(ata_mask);
/*
* Check the state of the status register.
*/
int ata_status(struct ata_device *drive, u8 good, u8 bad)
{
struct ata_channel *ch = drive->channel;
drive->status = IN_BYTE(ch->io_ports[IDE_STATUS_OFFSET]);
return (drive->status & (good | bad)) == good;
}
EXPORT_SYMBOL(ata_status);
/*
* This is used to check for the drive status on the IRQ handling code path.
*/
int ata_status_irq(struct ata_device *drive)
{
if (test_bit(IDE_DMA, drive->channel->active))
return udma_irq_status(drive);
/* Need to guarantee 400ns since last command was issued?
*/
#ifdef CONFIG_IDEPCI_SHARE_IRQ
/*
* We do a passive status test under shared PCI interrupts on cards
* that truly share the ATA side interrupt, but may also share an
* interrupt with another pci card/device.
*/
if (drive->channel->io_ports[IDE_CONTROL_OFFSET])
drive->status = IN_BYTE(drive->channel->io_ports[IDE_CONTROL_OFFSET]);
else
#endif
ata_status(drive, 0, 0); /* Note: this may clear a pending IRQ! */
if (drive->status & BUSY_STAT)
return 0; /* drive busy: definitely not interrupting */
else
return 1; /* drive ready: *might* be interrupting */
}
EXPORT_SYMBOL(ata_status_irq);
/*
* Busy-wait for the drive status to be not "busy". Check then the status for
* all of the "good" bits and none of the "bad" bits, and if all is okay it
* returns 0. All other cases return 1 after invoking error handler -- caller
* should just return.
*/
int ata_status_poll(struct ata_device *drive, u8 good, u8 bad,
unsigned long timeout, struct request *rq)
{
int i;
/* bail early if we've exceeded max_failures */
if (drive->max_failures && (drive->failures > drive->max_failures))
return ATA_OP_FINISHED;
/*
* Spin until the drive is no longer busy.
* Spec allows drive 400ns to assert "BUSY"
*/
udelay(1);
if (!ata_status(drive, 0, BUSY_STAT)) {
unsigned long flags;
local_save_flags(flags);
local_irq_enable();
timeout += jiffies;
while (!ata_status(drive, 0, BUSY_STAT)) {
if (time_after(jiffies, timeout)) {
local_irq_restore(flags);
return ata_error(drive, rq, "status timeout");
}
}
local_irq_restore(flags);
}
/*
* Allow status to settle, then read it again. A few rare drives
* vastly violate the 400ns spec here, so we'll wait up to 10usec for a
* "good" status rather than expensively fail things immediately. This
* fix courtesy of Matthew Faupel & Niccolo Rigacci.
*/
for (i = 0; i < 10; i++) {
udelay(1);
if (ata_status(drive, good, bad))
return ATA_OP_READY;
}
return ata_error(drive, rq, "status error");
}
EXPORT_SYMBOL(ata_status_poll);
/*
* Handle the nIEN - negated Interrupt ENable of the drive.
* This is controlling whatever the drive will acnowlenge commands
* with interrupts or not.
*/
int ata_irq_enable(struct ata_device *drive, int on)
{
struct ata_channel *ch = drive->channel;
if (!ch->io_ports[IDE_CONTROL_OFFSET])
return 0;
/* 0x08 is for legacy ATA-1 devices */
if (on)
OUT_BYTE(0x08 | 0x00, ch->io_ports[IDE_CONTROL_OFFSET]);
else {
if (!ch->intrproc)
OUT_BYTE(0x08 | 0x02, ch->io_ports[IDE_CONTROL_OFFSET]);
else
ch->intrproc(drive);
}
return 1;
}
EXPORT_SYMBOL(ata_irq_enable);
/*
* Perform a reset operation on the currently selected drive.
*/
void ata_reset(struct ata_channel *ch)
{
unsigned long timeout = jiffies + WAIT_WORSTCASE;
u8 stat;
if (!ch->io_ports[IDE_CONTROL_OFFSET])
return;
printk("%s: reset\n", ch->name);
/* 0x08 is for legacy ATA-1 devices */
OUT_BYTE(0x08 | 0x04, ch->io_ports[IDE_CONTROL_OFFSET]);
udelay(10);
/* 0x08 is for legacy ATA-1 devices */
OUT_BYTE(0x08 | 0x00, ch->io_ports[IDE_CONTROL_OFFSET]);
do {
mdelay(50);
stat = IN_BYTE(ch->io_ports[IDE_STATUS_OFFSET]);
} while ((stat & BUSY_STAT) && time_before(jiffies, timeout));
}
EXPORT_SYMBOL(ata_reset);
/*
* Output a complete register file.
*/
void ata_out_regfile(struct ata_device *drive, struct hd_drive_task_hdr *rf)
{
struct ata_channel *ch = drive->channel;
OUT_BYTE(rf->feature, ch->io_ports[IDE_FEATURE_OFFSET]);
OUT_BYTE(rf->sector_count, ch->io_ports[IDE_NSECTOR_OFFSET]);
OUT_BYTE(rf->sector_number, ch->io_ports[IDE_SECTOR_OFFSET]);
OUT_BYTE(rf->low_cylinder, ch->io_ports[IDE_LCYL_OFFSET]);
OUT_BYTE(rf->high_cylinder, ch->io_ports[IDE_HCYL_OFFSET]);
}
EXPORT_SYMBOL(ata_out_regfile);
/*
* Input a complete register file.
*/
void ata_in_regfile(struct ata_device *drive, struct hd_drive_task_hdr *rf)
{
struct ata_channel *ch = drive->channel;
rf->sector_count = IN_BYTE(ch->io_ports[IDE_NSECTOR_OFFSET]);
rf->sector_number = IN_BYTE(ch->io_ports[IDE_SECTOR_OFFSET]);
rf->low_cylinder = IN_BYTE(ch->io_ports[IDE_LCYL_OFFSET]);
rf->high_cylinder = IN_BYTE(ch->io_ports[IDE_HCYL_OFFSET]);
}
MODULE_LICENSE("GPL");
|
