stm32/sdram: Update MPU settings to block invalid region, change attrs.

Set the active MPU region to the actual size of SDRAM configured and
invalidate the rest of the memory-mapped region, to prevent errors due to
CPU speculation.  Also update the attributes of the SDRAM region as per ST
recommendations, and change region numbers to avoid conflicts elsewhere in
the codebase (see eth usage).

1 files changed, 28 insertions, 5 deletions

diff --git a/ports/stm32/sdram.c b/ports/stm32/sdram.c
index e2b29c56e..b3c5bbeee 100644
--- a/ports/stm32/sdram.c
+++ b/ports/stm32/sdram.c
@@ -39,6 +39,13 @@
 #define SDRAM_START_ADDRESS 0xD0000000
 #endif
 
+// Provides the MPU_REGION_SIZE_X value when passed the size of region in bytes
+// "m" must be a power of 2 between 32 and 4G (2**5 and 2**32) and this formula
+// computes the log2 of "m", minus 1
+#define MPU_REGION_SIZE(m) (((m) - 1) / (((m) - 1) % 255 + 1) / 255 % 255 * 8 + 7 - 86 / (((m) - 1) % 255 + 12) - 1)
+
+#define SDRAM_MPU_REGION_SIZE (MPU_REGION_SIZE(MICROPY_HW_SDRAM_SIZE))
+
 #ifdef FMC_SDRAM_BANK
 
 static void sdram_init_seq(SDRAM_HandleTypeDef
@@ -244,17 +251,33 @@ static void sdram_init_seq(SDRAM_HandleTypeDef
     /* Disable the MPU */
     HAL_MPU_Disable();
 
-    /* Configure the MPU attributes as Write-Through for External SDRAM */
+    /* Configure the MPU attributes for External SDRAM
+       Initially disable all access for the entire SDRAM memory space,
+       then enable access/caching for the size used
+    */
     MPU_InitStruct.Enable = MPU_REGION_ENABLE;
+    MPU_InitStruct.Number = MPU_REGION_NUMBER4;
     MPU_InitStruct.BaseAddress = SDRAM_START_ADDRESS;
-    MPU_InitStruct.Size = MPU_REGION_SIZE_256MB;
-    MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
+    MPU_InitStruct.Size = MPU_REGION_SIZE_512MB;
+    MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
     MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
-    MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
+    MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
     MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
-    MPU_InitStruct.Number = MPU_REGION_NUMBER0;
     MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
     MPU_InitStruct.SubRegionDisable = 0x00;
+    MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
+    HAL_MPU_ConfigRegion(&MPU_InitStruct);
+
+    MPU_InitStruct.Enable = MPU_REGION_ENABLE;
+    MPU_InitStruct.Number = MPU_REGION_NUMBER5;
+    MPU_InitStruct.BaseAddress = SDRAM_START_ADDRESS;
+    MPU_InitStruct.Size = SDRAM_MPU_REGION_SIZE;
+    MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
+    MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
+    MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
+    MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
+    MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
+    MPU_InitStruct.SubRegionDisable = 0x00;
     MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
     HAL_MPU_ConfigRegion(&MPU_InitStruct);