summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorrobert-hh <robert@hammelrath.com>2024-09-24 17:09:06 +0200
committerDamien George <damien@micropython.org>2024-11-18 23:51:02 +1100
commit4a159d16febeba65b2de52cb05657b9515a9bcae (patch)
tree56b4c96d139b67c30cfe3d48a48850b1ada5ae89
parent85de67f55d2afb5c75388d639e51e3df7640b4a7 (diff)
samd/boards/SAMD21_XPLAINED_PRO: Use the SPI flash for the file system.
The initial settings did not support it. The change required to add a dedicated handling of the Adesto 1MByte flash of the XPLAINED PRO board, which does not support the sfdp feature. Fixes the ID check of the Adesto/Renesas 1MByte flash. Signed-off-by: robert-hh <robert@hammelrath.com>
-rw-r--r--ports/samd/boards/SAMD21_XPLAINED_PRO/mpconfigboard.h4
-rw-r--r--ports/samd/boards/SAMD21_XPLAINED_PRO/mpconfigboard.mk2
-rw-r--r--ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv4
-rw-r--r--ports/samd/samd_spiflash.c43
4 files changed, 42 insertions, 11 deletions
diff --git a/ports/samd/boards/SAMD21_XPLAINED_PRO/mpconfigboard.h b/ports/samd/boards/SAMD21_XPLAINED_PRO/mpconfigboard.h
index 064d1ecc0..09bad81bb 100644
--- a/ports/samd/boards/SAMD21_XPLAINED_PRO/mpconfigboard.h
+++ b/ports/samd/boards/SAMD21_XPLAINED_PRO/mpconfigboard.h
@@ -2,3 +2,7 @@
#define MICROPY_HW_MCU_NAME "SAMD21J18A"
#define MICROPY_HW_XOSC32K (1)
+
+#define MICROPY_HW_SPIFLASH (1)
+#define MICROPY_HW_SPIFLASH_ID (5)
+#define MICROPY_HW_SPIFLASH_BAUDRATE (12000000)
diff --git a/ports/samd/boards/SAMD21_XPLAINED_PRO/mpconfigboard.mk b/ports/samd/boards/SAMD21_XPLAINED_PRO/mpconfigboard.mk
index f95c65493..cc43c22ce 100644
--- a/ports/samd/boards/SAMD21_XPLAINED_PRO/mpconfigboard.mk
+++ b/ports/samd/boards/SAMD21_XPLAINED_PRO/mpconfigboard.mk
@@ -2,3 +2,5 @@ MCU_SERIES = SAMD21
CMSIS_MCU = SAMD21J18A
LD_FILES = boards/samd21x18a.ld sections.ld
TEXT0 = 0x2000
+
+MICROPY_HW_CODESIZE ?= 248K
diff --git a/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv b/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv
index 69d0c136d..e5327e791 100644
--- a/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv
+++ b/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv
@@ -53,3 +53,7 @@ USB_DP,PA25
SWCLK,PA30
SWDIO,PA31
+FLASH_MOSI,PB22
+FLASH_MISO,PB16
+FLASH_SCK,PB23
+FLASH_CS,PA13
diff --git a/ports/samd/samd_spiflash.c b/ports/samd/samd_spiflash.c
index cd4f10640..8ada7e960 100644
--- a/ports/samd/samd_spiflash.c
+++ b/ports/samd/samd_spiflash.c
@@ -45,6 +45,7 @@ const uint8_t _COMMANDS_32BIT[] = {0x13, 0x12, 0x21}; // READ, PROGRAM_PAGE, ER
#define COMMAND_JEDEC_ID (0x9F)
#define COMMAND_READ_STATUS (0x05)
+#define COMMAND_WRITE_SR1 (0x01)
#define COMMAND_WRITE_ENABLE (0x06)
#define COMMAND_READ_SFDP (0x5A)
#define PAGE_SIZE (256)
@@ -88,7 +89,7 @@ static void wait(spiflash_obj_t *self) {
mp_hal_pin_write(self->cs, 0);
spi_transfer((mp_obj_base_t *)self->spi, 2, msg, msg);
mp_hal_pin_write(self->cs, 1);
- } while (msg[1] != 0 && timeout-- > 0);
+ } while ((msg[1] & 1) != 0 && timeout-- > 0);
}
static void get_id(spiflash_obj_t *self, uint8_t id[3]) {
@@ -123,6 +124,17 @@ static void write_enable(spiflash_obj_t *self) {
mp_hal_pin_write(self->cs, 1);
}
+// Write status register 1
+static void write_sr1(spiflash_obj_t *self, uint8_t value) {
+ uint8_t msg[2];
+ msg[0] = COMMAND_WRITE_SR1;
+ msg[1] = value;
+
+ mp_hal_pin_write(self->cs, 0);
+ spi_transfer(self->spi, 2, msg, NULL);
+ mp_hal_pin_write(self->cs, 1);
+}
+
static void get_sfdp(spiflash_obj_t *self, uint32_t addr, uint8_t *buffer, int size) {
uint8_t dummy[1];
write_addr(self, COMMAND_READ_SFDP, addr);
@@ -155,27 +167,36 @@ static mp_obj_t spiflash_make_new(const mp_obj_type_t *type, size_t n_args, size
mp_hal_pin_write(self->cs, 1);
wait(self);
-
// Get the flash size from the device ID (default)
uint8_t id[3];
get_id(self, id);
+ bool read_sfdp = true;
+
if (id[1] == 0x84 && id[2] == 1) { // Adesto
self->size = 512 * 1024;
- } else if (id[1] == 0x1f && id[2] == 1) { // Atmel / Renesas
+ } else if (id[0] == 0x1f && id[1] == 0x45 && id[2] == 1) { // Adesto/Renesas 8 MBit
self->size = 1024 * 1024;
+ read_sfdp = false;
+ self->sectorsize = 4096;
+ self->addr_is_32bit = false;
+ // Globally unlock the sectors, which are locked after power on.
+ write_enable(self);
+ write_sr1(self, 0);
} else {
self->size = 1 << id[2];
}
// Get the addr_is_32bit flag and the sector size
- uint8_t buffer[128];
- get_sfdp(self, 0, buffer, 16); // get the header
- int len = MIN(buffer[11] * 4, sizeof(buffer));
- if (len >= 29) {
- int addr = buffer[12] + (buffer[13] << 8) + (buffer[14] << 16);
- get_sfdp(self, addr, buffer, len); // Get the JEDEC mandatory table
- self->sectorsize = 1 << buffer[28];
- self->addr_is_32bit = ((buffer[2] >> 1) & 0x03) != 0;
+ if (read_sfdp) {
+ uint8_t buffer[128];
+ get_sfdp(self, 0, buffer, 16); // get the header
+ int len = MIN(buffer[11] * 4, sizeof(buffer));
+ if (len >= 29) {
+ int addr = buffer[12] + (buffer[13] << 8) + (buffer[14] << 16);
+ get_sfdp(self, addr, buffer, len); // Get the JEDEC mandatory table
+ self->sectorsize = 1 << buffer[28];
+ self->addr_is_32bit = ((buffer[2] >> 1) & 0x03) != 0;
+ }
}
self->commands = self->addr_is_32bit ? _COMMANDS_32BIT : _COMMANDS_24BIT;