summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorCarl Pottle <cpottle9@outlook.com>2024-12-29 15:20:37 -0800
committerDamien George <damien@micropython.org>2025-02-07 11:51:41 +1100
commit55ae597bb6044c392e9264f1af09ddcc19901f44 (patch)
tree8f9cc72fc15dc7fafc185b276852b6a9a14cbf90
parent112f65776588ef0cc3307f8bef208a480037d7d0 (diff)
rp2/modmachine: Make lightsleep preserve SLEEP_EN0 and SLEEP_EN1.
The problem was introduced in d1423ef7a23793de3777e84d985f9902241e788e, calling `machine.lightsleep()` overwrites RP2xxx registers `SLEEP_EN0` and `SLEEP_EN1` with their power on default values. Prior to that commit the register values were saved on entry to lightsleep and restored before returning. These changes restores the earlier behavior. Fixes issue #16502. Signed-off-by: Carl Pottle <cpottle9@outlook.com>
-rw-r--r--ports/rp2/modmachine.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index 3229aed27..954ea2164 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -196,6 +196,8 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
#endif
xosc_dormant();
} else {
+ uint32_t save_sleep_en0 = clocks_hw->sleep_en0;
+ uint32_t save_sleep_en1 = clocks_hw->sleep_en1;
bool timer3_enabled = irq_is_enabled(3);
const uint32_t alarm_num = 3;
@@ -251,8 +253,8 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
if (!timer3_enabled) {
irq_set_enabled(irq_num, false);
}
- clocks_hw->sleep_en0 |= ~(0u);
- clocks_hw->sleep_en1 |= ~(0u);
+ clocks_hw->sleep_en0 = save_sleep_en0;
+ clocks_hw->sleep_en1 = save_sleep_en1;
}
// Enable ROSC.