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authorDamien George <damien@micropython.org>2023-09-13 16:06:06 +1000
committerDamien George <damien@micropython.org>2023-09-13 16:48:15 +1000
commit67b1c81f69d6cd1c5ad9c35bb68f4490e94865e5 (patch)
tree4f3923e2f325c5fadc0a5b73160bad1fd540bdea
parent60e0ef6ef6a06f9a892cafd83bf9dd367c3247e3 (diff)
stm32/powerctrlboot: Allow using PLL3 for USB clock on H5 MCU's.
A board should enable MICROPY_HW_CLK_USE_PLL3_FOR_USB to use this feature. Signed-off-by: Damien George <damien@micropython.org>
-rw-r--r--ports/stm32/powerctrlboot.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/ports/stm32/powerctrlboot.c b/ports/stm32/powerctrlboot.c
index b075073a5..220375a51 100644
--- a/ports/stm32/powerctrlboot.c
+++ b/ports/stm32/powerctrlboot.c
@@ -251,7 +251,7 @@ void SystemClock_Config(void) {
powerctrl_config_systick();
// USB clock configuration, either HSI48 or PLL3.
- #if 1
+ #if MICROPY_HW_ENABLE_USB && !MICROPY_HW_CLK_USE_PLL3_FOR_USB
// Enable HSI48.
LL_RCC_HSI48_Enable();
@@ -267,7 +267,7 @@ void SystemClock_Config(void) {
| __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000) << CRS_CFGR_RELOAD_Pos;
CRS->CR = 0x20 << CRS_CR_TRIM_Pos | CRS_CR_AUTOTRIMEN | CRS_CR_CEN;
- #else
+ #elif MICROPY_HW_ENABLE_USB && MICROPY_HW_CLK_USE_PLL3_FOR_USB
// Configure PLL3 for use by USB at Q=48MHz.
LL_RCC_PLL3_SetSource(LL_RCC_PLL3SOURCE_HSE);