diff options
| author | Damien George <damien@micropython.org> | 2025-10-27 14:48:33 +1100 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2025-11-20 13:01:35 +1100 |
| commit | 7713cdd8fe9e57832ccd4794313d84f3480438f5 (patch) | |
| tree | fa23c8c0cbd571ed08b355fbc4a3061441e4f585 | |
| parent | 769f5cf1a96a64454c837d3d201f8c06e44baaad (diff) | |
stm32/eth_phy: Add support for RTL8211 ETH PHY.
Signed-off-by: Damien George <damien@micropython.org>
| -rw-r--r-- | ports/stm32/eth.c | 2 | ||||
| -rw-r--r-- | ports/stm32/eth.h | 3 | ||||
| -rw-r--r-- | ports/stm32/eth_phy.c | 31 | ||||
| -rw-r--r-- | ports/stm32/eth_phy.h | 1 |
4 files changed, 36 insertions, 1 deletions
diff --git a/ports/stm32/eth.c b/ports/stm32/eth.c index 0f8af5311..5f2478f08 100644 --- a/ports/stm32/eth.c +++ b/ports/stm32/eth.c @@ -216,6 +216,8 @@ int eth_init(eth_t *self, int mac_idx, uint32_t phy_addr, int phy_type) { self->phy_get_link_status = eth_phy_dp838xx_get_link_status; } else if (phy_type == ETH_PHY_LAN8720 || phy_type == ETH_PHY_LAN8742) { self->phy_get_link_status = eth_phy_lan87xx_get_link_status; + } else if (phy_type == ETH_PHY_RTL8211) { + self->phy_get_link_status = eth_phy_rtl8211_get_link_status; } else { return -1; } diff --git a/ports/stm32/eth.h b/ports/stm32/eth.h index 564744969..6556f4a7c 100644 --- a/ports/stm32/eth.h +++ b/ports/stm32/eth.h @@ -30,7 +30,8 @@ enum { ETH_PHY_LAN8742 = 0, ETH_PHY_LAN8720, ETH_PHY_DP83848, - ETH_PHY_DP83825 + ETH_PHY_DP83825, + ETH_PHY_RTL8211 }; typedef struct _eth_t eth_t; diff --git a/ports/stm32/eth_phy.c b/ports/stm32/eth_phy.c index 2435cc3e0..5b4673cc7 100644 --- a/ports/stm32/eth_phy.c +++ b/ports/stm32/eth_phy.c @@ -40,6 +40,14 @@ #define PHY_SCSR_DP838XX_DUPLEX_Msk (4) #define PHY_SCSR_DP838XX_10M_Msk (2) +#define PHY_RTL8211_DEFAULT_PAGE (0xa42) +#define PHY_RTL8211_PAGSR_ADDR (0x1f) +#define PHY_RTL8211_PHYSR_PAGE (0xa43) +#define PHY_RTL8211_PHYSR_ADDR (0x1a) +#define PHY_RTL8211_PHYSR_SPEED_Pos (4) +#define PHY_RTL8211_PHYSR_SPEED_Msk (3 << PHY_RTL8211_PHYSR_SPEED_Pos) +#define PHY_RTL8211_PHYSR_DUPLEX_Msk (0x0008) + int16_t eth_phy_lan87xx_get_link_status(uint32_t phy_addr) { // Get the link mode & speed uint16_t scsr = eth_phy_read(phy_addr, PHY_SCSR_LAN87XX); @@ -67,4 +75,27 @@ int16_t eth_phy_dp838xx_get_link_status(uint32_t phy_addr) { return scsr; } +int16_t eth_phy_rtl8211_get_link_status(uint32_t phy_addr) { + // Get the link mode & speed + eth_phy_write(phy_addr, PHY_RTL8211_PAGSR_ADDR, PHY_RTL8211_PHYSR_PAGE); + int16_t physr = eth_phy_read(phy_addr, PHY_RTL8211_PHYSR_ADDR); + eth_phy_write(phy_addr, PHY_RTL8211_PAGSR_ADDR, PHY_RTL8211_DEFAULT_PAGE); + int16_t status = 0; + switch ((physr & PHY_RTL8211_PHYSR_SPEED_Msk) >> PHY_RTL8211_PHYSR_SPEED_Pos) { + case 0: + status |= PHY_SPEED_10HALF; + break; + case 1: + status |= PHY_SPEED_100HALF; + break; + case 2: + status |= PHY_SPEED_1000HALF; + break; + } + if (physr & PHY_RTL8211_PHYSR_DUPLEX_Msk) { + status |= PHY_DUPLEX; + } + return status; +} + #endif diff --git a/ports/stm32/eth_phy.h b/ports/stm32/eth_phy.h index 1f2045082..79f0d7003 100644 --- a/ports/stm32/eth_phy.h +++ b/ports/stm32/eth_phy.h @@ -63,6 +63,7 @@ void eth_phy_write(uint32_t phy_addr, uint32_t reg, uint32_t val); int16_t eth_phy_lan87xx_get_link_status(uint32_t phy_addr); int16_t eth_phy_dp838xx_get_link_status(uint32_t phy_addr); +int16_t eth_phy_rtl8211_get_link_status(uint32_t phy_addr); #endif |