stm32/boards: Set RCC_HSE_BYPASS for relevant NUCLEO boards.

For NUCLEO boards that does not have HSE crystal, HSEState should set
RCC_HSE_BYPASS to use HSE clock from ST-LINK 8MHz.

Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>

5 files changed, 12 insertions, 2 deletions

diff --git a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h
index 6150765e1..21ce91fd9 100644
--- a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h
+++ b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h
@@ -9,12 +9,14 @@
 // HSE is 8MHz, HSI is 16MHz CPU freq set to 84MHz
 // Default source for the clock is HSI.
 // For revisions of the board greater than C-01, HSE can be used as a
-// clock source by removing the #define MICROPY_HW_CLK_USE_HSE line
+// clock source by removing the #define MICROPY_HW_CLK_USE_HSI line
 #define MICROPY_HW_CLK_USE_HSI (1)
 
 #if MICROPY_HW_CLK_USE_HSI
 #define MICROPY_HW_CLK_PLLM (16)
 #else
+// HSE comes from ST-LINK 8MHz, not crystal.
+#define MICROPY_HW_CLK_USE_BYPASS (1)
 #define MICROPY_HW_CLK_PLLM (8)
 #endif
 #define MICROPY_HW_CLK_PLLN (336)
diff --git a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h
index a0a6dbf8c..62fd5abe6 100644
--- a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h
+++ b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h
@@ -14,6 +14,8 @@
 #define MICROPY_HW_CLK_PLLN (336)
 #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
 #define MICROPY_HW_CLK_PLLQ (7)
+// HSE comes from ST-LINK 8MHz, not crystal.
+#define MICROPY_HW_CLK_USE_BYPASS (1)
 
 // UART config
 #define MICROPY_HW_UART1_TX     (pin_B6)    // Arduino D10, pin 17 on CN10
diff --git a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h
index 4ed9f4183..e607d5f93 100644
--- a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h
+++ b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h
@@ -21,6 +21,8 @@ void NUCLEO_F767ZI_board_early_init(void);
 #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
 #define MICROPY_HW_CLK_PLLQ (9)
 #define MICROPY_HW_FLASH_LATENCY (FLASH_LATENCY_7) // 210-216 MHz needs 7 wait states
+// HSE comes from ST-LINK 8MHz, not crystal.
+#define MICROPY_HW_CLK_USE_BYPASS (1)
 
 // UART config
 #define MICROPY_HW_UART2_TX         (pin_D5)
diff --git a/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.h b/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.h
index 5b83a980c..4eef1db8f 100644
--- a/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.h
+++ b/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.h
@@ -12,7 +12,7 @@
 // HSE is 8MHz, HSI is 16MHz CPU freq set to 32MHz
 // Default source for the clock is HSI.
 // For revisions of the board greater than C-01, HSE can be used as a
-// clock source by removing the #define MICROPY_HW_CLK_USE_HSE line
+// clock source by removing the #define MICROPY_HW_CLK_USE_HSI line
 #define MICROPY_HW_CLK_USE_HSI (1)
 
 #if MICROPY_HW_CLK_USE_HSI
@@ -21,6 +21,8 @@
 #else
 #define MICROPY_HW_CLK_PLLMUL (RCC_CFGR_PLLMUL12)
 #define MICROPY_HW_CLK_PLLDIV (RCC_CFGR_PLLDIV3)
+// HSE comes from ST-LINK 8MHz, not crystal.
+#define MICROPY_HW_CLK_USE_BYPASS (1)
 #endif
 
 // UART config
diff --git a/ports/stm32/powerctrlboot.c b/ports/stm32/powerctrlboot.c
index 059d2a45d..2354deb4d 100644
--- a/ports/stm32/powerctrlboot.c
+++ b/ports/stm32/powerctrlboot.c
@@ -385,7 +385,9 @@ void SystemClock_Config(void) {
     RCC->CFGR = RCC_CFGR_PLLSRC_HSI;
     #else
     // Enable the 8MHz external oscillator
+    #if MICROPY_HW_CLK_USE_BYPASS
     RCC->CR |= RCC_CR_HSEBYP;
+    #endif
     RCC->CR |= RCC_CR_HSEON;
     while (!(RCC->CR & RCC_CR_HSERDY)) {
     }