stm32/boards: Add new board MikroElektronika Quail, and F427 support.

Quail (https://www.mikroe.com/quail, PID: MIKROE-1793) is based on an
STM32F427VI CPU, featuring 2048 kB of Flash memory and 192 kB of RAM.  An
on-board Cypress S25FL164K adds 8 MB of SPI Flash.

Quail has 4 mikroBUS(TM) sockets for Mikroe click(TM) board connectivity,
along with 24 screw terminals for connecting additional electronics and two
USB ports (one for programming, the other for external mass storage).

4 UARTs, 2 SPIs and 1 I2C bus are available for communication.

Signed-off-by: Lorenzo Cappelletti <lorenzo.cappelletti@gmail.com>

9 files changed, 345 insertions, 1 deletions

diff --git a/ports/stm32/boards/MIKROE_QUAIL/bdev.c b/ports/stm32/boards/MIKROE_QUAIL/bdev.c
new file mode 100644
index 000000000..7095817e4
--- /dev/null
+++ b/ports/stm32/boards/MIKROE_QUAIL/bdev.c
@@ -0,0 +1,28 @@
+#include "py/obj.h"
+#include "storage.h"
+#include "spi.h"
+
+#if !MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE
+
+STATIC const spi_proto_cfg_t spi_bus = {
+    .spi = &spi_obj[2], // SPI3 hardware peripheral
+    .baudrate = 25000000,
+    .polarity = 0,
+    .phase = 0,
+    .bits = 8,
+    .firstbit = SPI_FIRSTBIT_MSB,
+};
+
+STATIC mp_spiflash_cache_t spi_bdev_cache;
+
+const mp_spiflash_config_t spiflash_config = {
+    .bus_kind = MP_SPIFLASH_BUS_SPI,
+    .bus.u_spi.cs = MICROPY_HW_SPIFLASH_CS,
+    .bus.u_spi.data = (void *)&spi_bus,
+    .bus.u_spi.proto = &spi_proto,
+    .cache = &spi_bdev_cache,
+};
+
+spi_bdev_t spi_bdev;
+
+#endif
diff --git a/ports/stm32/boards/MIKROE_QUAIL/board.json b/ports/stm32/boards/MIKROE_QUAIL/board.json
new file mode 100644
index 000000000..ccd9b4fdc
--- /dev/null
+++ b/ports/stm32/boards/MIKROE_QUAIL/board.json
@@ -0,0 +1,18 @@
+{
+    "deploy": [
+        "../MIKROE_QUAIL/deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "mikroBUS"
+    ],
+    "id": "MIKROE-QUAIL",
+    "images": [
+            "quail_top.jpg"
+    ],
+    "mcu": "stm32f4",
+    "product": "MikroE Quail",
+    "thumbnail": "",
+    "url": "https://www.mikroe.com/quail",
+    "vendor": "MikroElektronika"
+}
diff --git a/ports/stm32/boards/MIKROE_QUAIL/deploy.md b/ports/stm32/boards/MIKROE_QUAIL/deploy.md
new file mode 100644
index 000000000..5d6ea00a2
--- /dev/null
+++ b/ports/stm32/boards/MIKROE_QUAIL/deploy.md
@@ -0,0 +1,13 @@
+### Quail via DFU
+
+Quail can be programmed via USB with the ST DFU bootloader, using
+e.g. [dfu-util](http://dfu-util.sourceforge.net/) or
+[pydfu.py](https://github.com/micropython/micropython/blob/master/tools/pydfu.py).
+
+To enter the bootloader press and release the Reset button while holding the
+Boot button.  Alternatively, you can use `machine.bootloader()` from the
+MicroPython REPL.
+
+```bash
+dfu-util --alt 0 -D firmware.dfu
+```
diff --git a/ports/stm32/boards/MIKROE_QUAIL/mpconfigboard.h b/ports/stm32/boards/MIKROE_QUAIL/mpconfigboard.h
new file mode 100644
index 000000000..6cb6b7260
--- /dev/null
+++ b/ports/stm32/boards/MIKROE_QUAIL/mpconfigboard.h
@@ -0,0 +1,109 @@
+#define MICROPY_HW_BOARD_NAME       "MikroE Quail"
+#define MICROPY_HW_MCU_NAME         "STM32F427VI"
+
+// 1 = use STM32 internal flash (1 MByte)
+// 0 = use onboard external SPI flash (8 MByte)
+#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0)
+
+#define MICROPY_HW_ENABLE_RNG       (1)
+#define MICROPY_HW_ENABLE_RTC       (1)
+#define MICROPY_HW_ENABLE_USB       (1)
+#define MICROPY_HW_HAS_FLASH        (1)
+
+// HSE is 12MHz
+#define MICROPY_HW_CLK_PLLM         (6)
+#define MICROPY_HW_CLK_PLLN         (336)
+#define MICROPY_HW_CLK_PLLP         (RCC_PLLP_DIV4)
+#define MICROPY_HW_CLK_PLLQ         (14)
+#define MICROPY_HW_CLK_LAST_FREQ    (1)
+
+// The board has no crystal for the RTC
+#define MICROPY_HW_RTC_USE_LSE      (0)
+#define MICROPY_HW_RTC_USE_US       (0)
+#define MICROPY_HW_RTC_USE_CALOUT   (0)  // turn on/off PC13 512Hz output
+
+// UART config
+// mikroBUS slot 1
+#define MICROPY_HW_UART3_NAME       "SLOT1"
+#define MICROPY_HW_UART3_TX         (pin_D8)
+#define MICROPY_HW_UART3_RX         (pin_D9)
+// mikroBUS slot 2
+#define MICROPY_HW_UART2_NAME       "SLOT2"
+#define MICROPY_HW_UART2_TX         (pin_D5)
+#define MICROPY_HW_UART2_RX         (pin_D6)
+// mikroBUS slot 3
+#define MICROPY_HW_UART6_NAME       "SLOT3"
+#define MICROPY_HW_UART6_TX         (pin_C6)
+#define MICROPY_HW_UART6_RX         (pin_C7)
+// mikroBUS slot 4
+#define MICROPY_HW_UART1_NAME       "SLOT4"
+#define MICROPY_HW_UART1_TX         (pin_A9)
+#define MICROPY_HW_UART1_RX         (pin_A10)
+
+// I2C buses
+// mikroBUS slot 1, 2, 3, 4, and header
+#define MICROPY_HW_I2C1_NAME        "SLOT1234H"
+#define MICROPY_HW_I2C1_SCL         (pin_B6)
+#define MICROPY_HW_I2C1_SDA         (pin_B7)
+
+// SPI buses
+// mikroBUS slot 1, 2, and header
+#define MICROPY_HW_SPI1_NAME        "SLOT12H"
+#define MICROPY_HW_SPI1_SCK         (pin_B3)
+#define MICROPY_HW_SPI1_MISO        (pin_B4)
+#define MICROPY_HW_SPI1_MOSI        (pin_B5)
+// mikroBUS slot 3, 4, and FLASH
+#define MICROPY_HW_SPI3_NAME        "SLOT34F"
+#define MICROPY_HW_SPI3_SCK         (pin_C10)
+#define MICROPY_HW_SPI3_MISO        (pin_C11)
+#define MICROPY_HW_SPI3_MOSI        (pin_C12)
+
+// LEDs
+#define MICROPY_HW_LED1             (pin_E15) // orange
+#define MICROPY_HW_LED2             (pin_E10) // green
+#define MICROPY_HW_LED3             (pin_C3)  // red
+#define MICROPY_HW_LED_ON(pin)      (mp_hal_pin_high(pin))
+#define MICROPY_HW_LED_OFF(pin)     (mp_hal_pin_low(pin))
+
+// USB config
+#define MICROPY_HW_USB_FS           (1)
+
+// External SPI Flash config (Cypress S25FL164K)
+#if !MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE
+
+#define MICROPY_HW_SPIFLASH_SIZE_BITS (64 * 1024 * 1024) // 64 Mbit (8 MByte)
+
+#define MICROPY_HW_SPIFLASH_CS (pin_A13)
+#define MICROPY_HW_SPIFLASH_SCK (MICROPY_HW_SPI3_SCK)
+#define MICROPY_HW_SPIFLASH_MISO (MICROPY_HW_SPI3_MISO)
+#define MICROPY_HW_SPIFLASH_MOSI (MICROPY_HW_SPI3_MOSI)
+
+extern const struct _mp_spiflash_config_t spiflash_config;
+extern struct _spi_bdev_t spi_bdev;
+#define MICROPY_HW_SPIFLASH_ENABLE_CACHE (1)
+#define MICROPY_HW_BDEV_IOCTL(op, arg) ( \
+    (op) == BDEV_IOCTL_NUM_BLOCKS ? (MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE) : \
+    (op) == BDEV_IOCTL_INIT ? spi_bdev_ioctl(&spi_bdev, (op), (uint32_t)&spiflash_config) : \
+    spi_bdev_ioctl(&spi_bdev, (op), (arg)) \
+)
+#define MICROPY_HW_BDEV_READBLOCKS(dest, bl, n) spi_bdev_readblocks(&spi_bdev, (dest), (bl), (n))
+#define MICROPY_HW_BDEV_WRITEBLOCKS(src, bl, n) spi_bdev_writeblocks(&spi_bdev, (src), (bl), (n))
+#define MICROPY_HW_BDEV_SPIFLASH_EXTENDED (&spi_bdev) // for extended block protocol
+
+#endif // !MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE
+
+// Bootloader configuration (only needed if Mboot is used)
+#define MBOOT_I2C_PERIPH_ID         1
+#define MBOOT_I2C_SCL               (pin_B6)
+#define MBOOT_I2C_SDA               (pin_B7)
+#define MBOOT_I2C_ALTFUNC           (4)
+#define MBOOT_FSLOAD                (1)
+#define MBOOT_VFS_FAT               (1)
+
+#define MBOOT_SPIFLASH_ADDR         (0x80000000)
+#define MBOOT_SPIFLASH_BYTE_SIZE    (8 * 1024 * 1024)
+#define MBOOT_SPIFLASH_LAYOUT       "/0x80000000/512*8Kg"
+#define MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE \
+                                    (8 / 4) // 8k page, 4k erase block
+#define MBOOT_SPIFLASH_CONFIG       (&spiflash_config)
+#define MBOOT_SPIFLASH_SPIFLASH     (&spi_bdev.spiflash)
diff --git a/ports/stm32/boards/MIKROE_QUAIL/mpconfigboard.mk b/ports/stm32/boards/MIKROE_QUAIL/mpconfigboard.mk
new file mode 100644
index 000000000..12f4f5798
--- /dev/null
+++ b/ports/stm32/boards/MIKROE_QUAIL/mpconfigboard.mk
@@ -0,0 +1,10 @@
+MCU_SERIES = f4
+CMSIS_MCU = STM32F427xx
+LD_FILES = boards/stm32f427xi.ld boards/common_ifs.ld
+TEXT0_ADDR = 0x08000000
+TEXT1_ADDR = 0x08020000
+
+# According to the datasheet, page 75, table 12, the alternate functions
+# of STM32F427xx and STM32F429xx are exactly the same.
+# See https://www.st.com/resource/en/datasheet/stm32f427vi.pdf.
+AF_FILE = boards/stm32f429_af.csv
diff --git a/ports/stm32/boards/MIKROE_QUAIL/pins.csv b/ports/stm32/boards/MIKROE_QUAIL/pins.csv
new file mode 100644
index 000000000..41868cf72
--- /dev/null
+++ b/ports/stm32/boards/MIKROE_QUAIL/pins.csv
@@ -0,0 +1,120 @@
+# Pin mapping for board MikroElektronika Quail, based on CPU STM32F427VIT6
+
+### mikroBUS ###########################
+
+# Slot 1 (SPI1, UART3, I2C1)
+MB1_AN,PA6
+MB1_RST,PA2
+MB1_CS,PA3
+MB1_SCK,PB3
+MB1_MISO,PB4
+MB1_MOSI,PB5
+MB1_PWM,PE9
+MB1_INT,PA1
+MB1_RX,PD9
+MB1_TX,PD8
+MB1_SCL,PB6
+MB1_SDA,PB7
+
+# Slot 2 (SPI1, UART2, I2C1)
+MB2_AN,PA4
+MB2_RST,PE1
+MB2_CS,PE0
+MB2_SCK,PB3
+MB2_MISO,PB4
+MB2_MOSI,PB5
+MB2_PWM,PD15
+MB2_INT,PB9
+MB2_RX,PD6
+MB2_TX,PD5
+MB2_SCL,PB6
+MB2_SDA,PB7
+
+# Slot 3 (SPI3, UART6, I2C1)
+MB3_AN,PA7
+MB3_RST,PD8
+MB3_CS,PD11
+MB3_SCK,PC10
+MB3_MISO,PC11
+MB3_MOSI,PC12
+MB3_PWM,PD13
+MB3_INT,PC8
+MB3_RX,PC7
+MB3_TX,PC6
+MB3_SCL,PB6
+MB3_SDA,PB7
+
+# Slot 4 (SPI3, UART1, I2C1)
+MB4_AN,PA5
+MB4_RST,PD0
+MB4_CS,PD1
+MB4_SCK,PC10
+MB4_MISO,PC11
+MB4_MOSI,PC12
+MB4_PWM,PD14
+MB4_INT,PA14
+MB4_RX,PA10
+MB4_TX,PA9
+MB4_SCL,PB6
+MB4_SDA,PB7
+
+
+### Edge Contacts ######################
+
+,PC5
+,PB0
+,PE7
+,PE8
+
+,PE11
+,PC4
+,PE13
+,PE14
+
+,PB10
+,PB11
+,PB12
+,PB13
+
+# I2C1
+,PB6
+,PB7
+
+# SPI3
+,PC10
+,PC11
+,PC12
+,PD10
+
+,PA15
+,PC13
+,PE6
+,PE5
+
+,PD2
+,PD3
+,PD4
+,PD7
+
+,PE2
+,PE3
+,PE4
+
+
+### FLASH Memory #######################
+
+# Spansion S25FL164K - SPI3
+FLASH_CS,PA13
+
+
+### LED ################################
+
+LED1,PE15
+LED2,PE10
+LED3,PC3
+
+
+### Micro USB ##########################
+
+,-PA11
+,-PA12
diff --git a/ports/stm32/boards/MIKROE_QUAIL/stm32f4xx_hal_conf.h b/ports/stm32/boards/MIKROE_QUAIL/stm32f4xx_hal_conf.h
new file mode 100644
index 000000000..b8b935915
--- /dev/null
+++ b/ports/stm32/boards/MIKROE_QUAIL/stm32f4xx_hal_conf.h
@@ -0,0 +1,18 @@
+/* This file is part of the MicroPython project, http://micropython.org/
+ * The MIT License (MIT)
+ * Copyright (c) 2021 Lorenzo Cappelletti
+ */
+#ifndef MICROPY_INCLUDED_STM32F4XX_HAL_CONF_H
+#define MICROPY_INCLUDED_STM32F4XX_HAL_CONF_H
+
+#include "boards/stm32f4xx_hal_conf_base.h"
+
+// Oscillator values in Hz
+#define HSE_VALUE (12000000)
+#define EXTERNAL_CLOCK_VALUE (12288000)
+
+// Oscillator timeouts in ms
+#define HSE_STARTUP_TIMEOUT (100)
+#define LSE_STARTUP_TIMEOUT (0)
+
+#endif // MICROPY_INCLUDED_STM32F4XX_HAL_CONF_H
diff --git a/ports/stm32/boards/stm32f427xi.ld b/ports/stm32/boards/stm32f427xi.ld
new file mode 100644
index 000000000..1197848af
--- /dev/null
+++ b/ports/stm32/boards/stm32f427xi.ld
@@ -0,0 +1,28 @@
+/*
+    GNU linker script for STM32F427xI
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */
+    FLASH_ISR (rx)  : ORIGIN = 0x08000000, LENGTH =   16K /* sector 0, 16 KiB */
+    FLASH_FS (rx)   : ORIGIN = 0x08004000, LENGTH =  112K /* sectors 1-4: 3*16K+64K */
+    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH =  896K /* sectors 5-11 are 128K */
+    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH =  192K
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 16K;
+
+/* Define the stack.  The stack is full descending so begins just above last byte
+   of RAM.  Note that EABI requires the stack to be 8-byte aligned for a call. */
+_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
+_sstack = _estack - 16K; /* tunable */
+
+/* RAM extents for the garbage collector */
+_ram_start = ORIGIN(RAM);
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_start = _ebss; /* heap starts just after statically allocated memory */
+_heap_end = _sstack;
diff --git a/ports/stm32/flashbdev.c b/ports/stm32/flashbdev.c
index 6be0cfee8..3b7609d4d 100644
--- a/ports/stm32/flashbdev.c
+++ b/ports/stm32/flashbdev.c
@@ -70,7 +70,7 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
 #define FLASH_MEM_SEG2_START_ADDR (0x08040000) // sector 6
 #define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 6: 64k(of 128k). Filesystem 176K + 64K = 240K
 
-#elif defined(STM32F429xx)
+#elif defined(STM32F427xx) || defined(STM32F429xx)
 
 #define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k
 #define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM