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| author | Alessandro Gatti <a.gatti@frob.it> | 2025-12-17 03:57:52 +0100 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2025-12-17 16:05:49 +1100 |
| commit | 9c9b99686edfc2809d09eebfb012eaeed5e3bb96 (patch) | |
| tree | 297d5f5e9c278478f2dcb423f5d1a86b670db9b0 | |
| parent | dbf59db5a10768b374d11f3a5d7cc40dc7afaa79 (diff) | |
tests/target_wiring: Provide an ESP8266 target wiring module.
This commit introduces ESP8266 support for target wiring tests, fixing
execution of relevant tests that once failed on that platform.
ESP8266 boards need to have GPIO4 and GPIO5 connected together to
provide a UART loopback, in order to test whether UART data effectively
flows through.
The wiring-enabled UART transmission timing test was also updated with
measurements compatible with a few ESP8266 test boards.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
| -rw-r--r-- | tests/extmod/machine_uart_tx.py | 2 | ||||
| -rw-r--r-- | tests/target_wiring/esp8266.py | 7 |
2 files changed, 9 insertions, 0 deletions
diff --git a/tests/extmod/machine_uart_tx.py b/tests/extmod/machine_uart_tx.py index 70d57be46..1ff9af64b 100644 --- a/tests/extmod/machine_uart_tx.py +++ b/tests/extmod/machine_uart_tx.py @@ -19,6 +19,8 @@ if "alif" in sys.platform: bit_margin = 1 elif "esp32" in sys.platform: timing_margin_us = 400 +elif "esp8266" in sys.platform: + timing_margin_us = 4100 elif "mimxrt" in sys.platform: initial_delay_ms = 20 # UART sends idle frame after init, so wait for that bit_margin = 1 diff --git a/tests/target_wiring/esp8266.py b/tests/target_wiring/esp8266.py new file mode 100644 index 000000000..336deb3dd --- /dev/null +++ b/tests/target_wiring/esp8266.py @@ -0,0 +1,7 @@ +# Target wiring for general esp8266 board. +# +# Connect: +# - GPIO4 to GPIO5 + +uart_loopback_args = (1,) +uart_loopback_kwargs = {} |