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authoriabdalkader <i.abdalkader@gmail.com>2025-10-18 14:15:26 +0200
committerDamien George <damien@micropython.org>2025-10-24 17:31:47 +1100
commitabbe883c0719c683fbb8382e204e4b50783fac24 (patch)
treeb4bbe2dc8224f44240716b5c271c442edbea5b6e
parente1f063a1fa622b0317a22e907ddb643d17514f40 (diff)
qemu/mcu/riscv: Implement ticks using the RDTIME control register.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
-rw-r--r--ports/qemu/Makefile2
-rw-r--r--ports/qemu/mcu/riscv/ticks.c68
2 files changed, 70 insertions, 0 deletions
diff --git a/ports/qemu/Makefile b/ports/qemu/Makefile
index 4325a96f9..03f004c75 100644
--- a/ports/qemu/Makefile
+++ b/ports/qemu/Makefile
@@ -110,6 +110,7 @@ LDFLAGS += -mabi=$(RV32_ABI) -march=$(RV32_ARCH) -Wl,-EL
SRC_C += \
mcu/rv32/interrupts.c \
mcu/rv32/startup.c \
+ mcu/riscv/ticks.c \
SRC_BOARD_O += mcu/rv32/entrypoint.o
@@ -143,6 +144,7 @@ LDFLAGS += -mabi=$(RV64_ABI) -march=$(RV64_ARCH) -Wl,-EL -mcmodel=medany
SRC_C += \
mcu/rv64/interrupts.c \
mcu/rv64/startup.c \
+ mcu/riscv/ticks.c \
SRC_BOARD_O += mcu/rv64/entrypoint.o
diff --git a/ports/qemu/mcu/riscv/ticks.c b/ports/qemu/mcu/riscv/ticks.c
new file mode 100644
index 000000000..2ab521994
--- /dev/null
+++ b/ports/qemu/mcu/riscv/ticks.c
@@ -0,0 +1,68 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ibrahim Abdelkader <iabdalkader@openmv.io>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+
+// RISC-V timebase frequency for QEMU
+#ifndef TIMEBASE_FREQ_HZ
+#define TIMEBASE_FREQ_HZ 10000000u
+#endif
+
+static uint64_t ticks_get_ticks(void) {
+ #if __riscv_xlen < 64
+ uint32_t ticks_lo = 0;
+ uint32_t ticks_hi = 0;
+ uint32_t rollover = 0;
+ do {
+ __asm volatile (
+ "rdtimeh %0 \n"
+ "rdtime %1 \n"
+ "rdtimeh %2 \n"
+ : "=r" (ticks_hi), "=r" (ticks_lo), "=r" (rollover)
+ :
+ :
+ );
+ } while (ticks_hi != rollover);
+ return ((uint64_t)(ticks_hi) << 32ULL) | (uint64_t)(ticks_lo);
+ #else
+ uint64_t ticks = 0;
+ __asm volatile (
+ "rdtime %0 \n"
+ : "=r" (ticks)
+ :
+ :
+ );
+ return ticks;
+ #endif
+}
+
+uintptr_t ticks_ms(void) {
+ return (uintptr_t)(ticks_get_ticks() / (TIMEBASE_FREQ_HZ / 1000));
+}
+
+uintptr_t ticks_us(void) {
+ return (uintptr_t)(ticks_get_ticks() / (TIMEBASE_FREQ_HZ / 1000000));
+}