diff options
| author | Yuuki NAGAO <wf.yn386@gmail.com> | 2023-07-01 10:25:18 +0900 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2023-07-13 12:23:34 +1000 |
| commit | ec9ea97413c6091c101c3ab10207ae4daf1c56db (patch) | |
| tree | c505ff5c7541db99207750f4dc71064ffbcd712d | |
| parent | cddeb5f0754e42f5e50da8ccefb5c073dce61be6 (diff) | |
stm32/dac: Fix dac.write_timed on G4 MCUs to use 32-bit DMA access.
For STMG4 MCUs, the peripheral registers for DAC have to be accessed by
words (32bits) because DAC is connected to AHB directly.
(This requirement is also there for other MCU series. However, if DAC is
connected to APB like F4/L1/L4 MCUs, AHB byte or half-word transfer is
changed into a 32-bit APB transfer. This means that PSIZE does not have to
be DMA_PDATAALIGN_WORD on these MCUs, and in fact must be BYTE/HALFWORD to
function correctly.)
Fixes issue #9563.
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
| -rw-r--r-- | ports/stm32/dac.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/ports/stm32/dac.c b/ports/stm32/dac.c index e44e519b6..7a446854f 100644 --- a/ports/stm32/dac.c +++ b/ports/stm32/dac.c @@ -170,9 +170,19 @@ STATIC void dac_start(uint32_t dac_channel) { STATIC void dac_start_dma(uint32_t dac_channel, const dma_descr_t *dma_descr, uint32_t dma_mode, uint32_t bit_size, uint32_t dac_align, size_t len, void *buf) { uint32_t dma_align; if (bit_size == 8) { + #if defined(STM32G4) + // For STM32G4, DAC registers have to be accessed by words (32-bit). + dma_align = DMA_MDATAALIGN_BYTE | DMA_PDATAALIGN_WORD; + #else dma_align = DMA_MDATAALIGN_BYTE | DMA_PDATAALIGN_BYTE; + #endif } else { + #if defined(STM32G4) + // For STM32G4, DAC registers have to be accessed by words (32-bit). + dma_align = DMA_MDATAALIGN_HALFWORD | DMA_PDATAALIGN_WORD; + #else dma_align = DMA_MDATAALIGN_HALFWORD | DMA_PDATAALIGN_HALFWORD; + #endif } uint32_t base; |