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authorpatrick <patrick@thinktransit.com.au>2023-05-17 01:06:04 +1000
committerDamien George <damien@micropython.org>2023-05-19 22:37:25 +1000
commit05e143dbddbde07e4f31a0376b8869bcf9fb1939 (patch)
tree9234225ace0e647640bb29b963640b87ad0aaa65 /docs/library
parent3a7ad642672a61d3adb1510bf26913376ff837c8 (diff)
esp32/esp32_ulp: Enable FSM ULP for S2 and S3 chips.
This commit enables the ULP for the S2 and S3 chips. Note this is the FSM (Finite State Machine) ULP. Signed-off-by: Patrick Joy <patrick@joytech.com.au>
Diffstat (limited to 'docs/library')
-rw-r--r--docs/library/esp32.rst8
1 files changed, 8 insertions, 0 deletions
diff --git a/docs/library/esp32.rst b/docs/library/esp32.rst
index 12d089021..d9241d545 100644
--- a/docs/library/esp32.rst
+++ b/docs/library/esp32.rst
@@ -279,6 +279,14 @@ For more details see Espressif's `ESP-IDF RMT documentation.
Ultra-Low-Power co-processor
----------------------------
+This class gives access to the Ultra Low Power (ULP) co-processor on the ESP32,
+ESP32-S2 and ESP32-S3 chips.
+
+.. warning::
+
+ This class does not provide access to the RISCV ULP co-processor available
+ on the ESP32-S2 and ESP32-S3 chips.
+
.. class:: ULP()
This class provides access to the Ultra-Low-Power co-processor.