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author | Mike Causer <mcauser@gmail.com> | 2016-08-01 09:52:00 +1000 |
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committer | Paul Sokolovsky <pfalcon@users.sourceforge.net> | 2016-08-02 11:17:46 +0300 |
commit | ce166e6b68b7fafb73a99fd64081f8a4155fe22a (patch) | |
tree | 20b063465b430968482cea18c41f949fbd2ec845 /docs/pyboard/tutorial/timer.rst | |
parent | 3eb532e97463b7f9b9ffe6f617a035284ef3e37b (diff) |
docs: Spelling mistakes
Diffstat (limited to 'docs/pyboard/tutorial/timer.rst')
-rw-r--r-- | docs/pyboard/tutorial/timer.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/pyboard/tutorial/timer.rst b/docs/pyboard/tutorial/timer.rst index fee01e17b..aedaaa13c 100644 --- a/docs/pyboard/tutorial/timer.rst +++ b/docs/pyboard/tutorial/timer.rst @@ -95,7 +95,7 @@ We set up timer 2 as follows:: The prescaler is set at 83, which makes this timer count at 1 MHz. This is because the CPU clock, running at 168 MHz, is divided by -2 and then by prescaler+1, giving a freqency of 168 MHz/2/(83+1)=1 MHz +2 and then by prescaler+1, giving a frequency of 168 MHz/2/(83+1)=1 MHz for timer 2. The period is set to a large number so that the timer can count up to a large number before wrapping back around to zero. In this case it will take about 17 minutes before it cycles back to |