diff options
author | Damien George <damien.p.george@gmail.com> | 2017-06-22 16:39:09 +1000 |
---|---|---|
committer | Damien George <damien.p.george@gmail.com> | 2017-06-22 16:39:09 +1000 |
commit | 46b849ab49b88ef1516b9c3b07859f54ed347676 (patch) | |
tree | 5476e7b91c710e51d809a1d91b5f2ac5b4dd5ccd /esp8266/machine_pin.c | |
parent | 6e80f0ee902f3027beb9b54efd6d983867d05ff1 (diff) |
esp8266: Move mp_hal_pin_open_drain from esp_mphal.c to machine_pin.c.
It belongs with the other pin config functions in machine_pin.c. Also,
esp_mphal.c is put in iRAM so this change saves about 300 bytes of iRAM
(and mp_hal_pin_open_drain is not a time critical function so doesn't
need to be in iRAM).
Diffstat (limited to 'esp8266/machine_pin.c')
-rw-r--r-- | esp8266/machine_pin.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/esp8266/machine_pin.c b/esp8266/machine_pin.c index 385551578..febbc1587 100644 --- a/esp8266/machine_pin.c +++ b/esp8266/machine_pin.c @@ -163,6 +163,28 @@ void mp_hal_pin_output(mp_hal_pin_obj_t pin_id) { } } +void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin_id) { + const pyb_pin_obj_t *pin = &pyb_pin_obj[pin_id]; + + if (pin->phys_port == 16) { + // configure GPIO16 as input with output register holding 0 + WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); + WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); + WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); // input + WRITE_PERI_REG(RTC_GPIO_OUT, (READ_PERI_REG(RTC_GPIO_OUT) & ~1)); // out=0 + return; + } + + ETS_GPIO_INTR_DISABLE(); + PIN_FUNC_SELECT(pin->periph, pin->func); + GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(pin->phys_port)), + GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(pin->phys_port))) + | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); // open drain + GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, + GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << pin->phys_port)); + ETS_GPIO_INTR_ENABLE(); +} + int pin_get(uint pin) { if (pin == 16) { return READ_PERI_REG(RTC_GPIO_IN_DATA) & 1; |