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authorDamien George <damien@micropython.org>2023-03-08 14:10:02 +1100
committerDamien George <damien@micropython.org>2023-04-27 18:03:06 +1000
commitb1229efbd1509654dec6053865ab828d769e29db (patch)
treee1a65606dd1f0a8cfe2af08f9c4ff821fb575b02 /ports/esp8266/uart.c
parente160fe7bc64212a3ce56f5478f208e2b4d343a8b (diff)
all: Fix spelling mistakes based on codespell check.
Signed-off-by: Damien George <damien@micropython.org>
Diffstat (limited to 'ports/esp8266/uart.c')
-rw-r--r--ports/esp8266/uart.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/ports/esp8266/uart.c b/ports/esp8266/uart.c
index 117cd1bf6..f761ecfd7 100644
--- a/ports/esp8266/uart.c
+++ b/ports/esp8266/uart.c
@@ -3,7 +3,7 @@
*
* FileName: uart.c
*
- * Description: Two UART mode configration and interrupt handler.
+ * Description: Two UART mode configuration and interrupt handler.
* Check your hardware connection while use this mode.
*
* Modification history:
@@ -164,7 +164,7 @@ uart_os_config(int uart) {
*******************************************************************************/
static void uart0_rx_intr_handler(void *para) {
- /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
+ /* uart0 and uart1 intr combine together, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
* uart1 and uart0 respectively
*/