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authorbadlyby <badlyby@gmail.com>2019-07-19 08:52:48 +0800
committerDamien George <damien.p.george@gmail.com>2019-07-25 16:31:12 +1000
commit0da2f6f23a8316f6810c47b2d8410bf11029f2a1 (patch)
tree0d32728b88b28abf2179776feacc18033cb1009f /ports/stm32/flashbdev.c
parent4d94fae83322dd1b4197fd770fa9d0b7474ce72b (diff)
stm32/flashbdev: Support internal filesystem on STM32F722/23/32/33.
Diffstat (limited to 'ports/stm32/flashbdev.c')
-rw-r--r--ports/stm32/flashbdev.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/ports/stm32/flashbdev.c b/ports/stm32/flashbdev.c
index 470f3d086..15bf0d6b0 100644
--- a/ports/stm32/flashbdev.c
+++ b/ports/stm32/flashbdev.c
@@ -86,6 +86,13 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
#define FLASH_MEM_SEG2_START_ADDR (0x08140000) // sector 18
#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 18: 64k(of 128k)
+#elif defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F732xx) || defined(STM32F733xx)
+
+#define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k
+#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max
+#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
+#define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k
+
#elif defined(STM32F746xx) || defined(STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx)
// The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this.