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| author | Yuuki NAGAO <wf.yn386@gmail.com> | 2025-07-22 23:17:09 +0900 |
|---|---|---|
| committer | Yuuki NAGAO <wf.yn386@gmail.com> | 2025-10-30 07:38:18 +0900 |
| commit | d20d19783d28972367db1fcf1c134f67e5e99dc7 (patch) | |
| tree | b2cb661a407a3d8261b0b4250eb9d4d537ac4843 /ports/stm32/machine_uart.c | |
| parent | 673524f55d8019d612a27c1d69992d061652cbb8 (diff) | |
stm32: Add STM32U5 support.
This change adds STM32U5 support to the STM32 port.
STM32U5A5ZJ: https://www.st.com/ja/microcontrollers-microprocessors/stm32u5a5zj.html
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
Diffstat (limited to 'ports/stm32/machine_uart.c')
| -rw-r--r-- | ports/stm32/machine_uart.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/ports/stm32/machine_uart.c b/ports/stm32/machine_uart.c index c93eade5d..5bb5b6c99 100644 --- a/ports/stm32/machine_uart.c +++ b/ports/stm32/machine_uart.c @@ -399,7 +399,7 @@ static bool mp_machine_uart_txdone(machine_uart_obj_t *self) { // Send a break condition. static void mp_machine_uart_sendbreak(machine_uart_obj_t *self) { - #if defined(STM32F0) || defined(STM32F7) || defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L0) || defined(STM32L4) || defined(STM32N6) || defined(STM32WB) || defined(STM32WL) + #if defined(STM32F0) || defined(STM32F7) || defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L0) || defined(STM32L4) || defined(STM32N6) || defined(STM32U5) || defined(STM32WB) || defined(STM32WL) self->uartx->RQR = USART_RQR_SBKRQ; // write-only register #else self->uartx->CR1 |= USART_CR1_SBK; |