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authorDamien George <damien.p.george@gmail.com>2019-02-21 15:18:33 +1100
committerDamien George <damien.p.george@gmail.com>2019-03-08 15:53:05 +1100
commit1396a026be78bc90ea18961ba6760f851b691b4c (patch)
tree4135ac73bcd2de56362d24895f8aec309666fce7 /py/asmarm.c
parent636ed0ff8d4d3c43f7d9fb2d8852073f99c1e6cf (diff)
py: Add support to save native, viper and asm code to .mpy files.
This commit adds support for saving and loading .mpy files that contain native code (native, viper and inline-asm). A lot of the ground work was already done for this in the form of removing pointers from generated native code. The changes here are mainly to link in qstr values to the native code, and change the format of .mpy files to contain native code blocks (possibly mixed with bytecode). A top-level summary: - @micropython.native, @micropython.viper and @micropython.asm_thumb/ asm_xtensa are now allowed in .py files when compiling to .mpy, and they work transparently to the user. - Entire .py files can be compiled to native via mpy-cross -X emit=native and for the most part the generated .mpy files should work the same as their bytecode version. - The .mpy file format is changed to 1) specify in the header if the file contains native code and if so the architecture (eg x86, ARMV7M, Xtensa); 2) for each function block the kind of code is specified (bytecode, native, viper, asm). - When native code is loaded from a .mpy file the native code must be modified (in place) to link qstr values in, just like bytecode (see py/persistentcode.c:arch_link_qstr() function). In addition, this now defines a public, native ABI for dynamically loadable native code generated by other languages, like C.
Diffstat (limited to 'py/asmarm.c')
-rw-r--r--py/asmarm.c16
1 files changed, 11 insertions, 5 deletions
diff --git a/py/asmarm.c b/py/asmarm.c
index 3610f838e..f2221f8a9 100644
--- a/py/asmarm.c
+++ b/py/asmarm.c
@@ -197,7 +197,16 @@ void asm_arm_mov_reg_reg(asm_arm_t *as, uint reg_dest, uint reg_src) {
emit_al(as, asm_arm_op_mov_reg(reg_dest, reg_src));
}
-void asm_arm_mov_reg_i32(asm_arm_t *as, uint rd, int imm) {
+size_t asm_arm_mov_reg_i32(asm_arm_t *as, uint rd, int imm) {
+ // Insert immediate into code and jump over it
+ emit_al(as, 0x59f0000 | (rd << 12)); // ldr rd, [pc]
+ emit_al(as, 0xa000000); // b pc
+ size_t loc = mp_asm_base_get_code_pos(&as->base);
+ emit(as, imm);
+ return loc;
+}
+
+void asm_arm_mov_reg_i32_optimised(asm_arm_t *as, uint rd, int imm) {
// TODO: There are more variants of immediate values
if ((imm & 0xFF) == imm) {
emit_al(as, asm_arm_op_mov_imm(rd, imm));
@@ -205,10 +214,7 @@ void asm_arm_mov_reg_i32(asm_arm_t *as, uint rd, int imm) {
// mvn is "move not", not "move negative"
emit_al(as, asm_arm_op_mvn_imm(rd, ~imm));
} else {
- //Insert immediate into code and jump over it
- emit_al(as, 0x59f0000 | (rd << 12)); // ldr rd, [pc]
- emit_al(as, 0xa000000); // b pc
- emit(as, imm);
+ asm_arm_mov_reg_i32(as, rd, imm);
}
}