diff options
| author | Damien George <damien.p.george@gmail.com> | 2016-12-09 22:54:45 +1100 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2016-12-09 22:54:45 +1100 |
| commit | 93ee6603b1a18401ae2968ee8f3012fd8b36a78c (patch) | |
| tree | 17f0ac2588831e303bfce06555a8f82df964dbea /py/asmarm.c | |
| parent | 155fdc74d5864266441887d6c88111159f401a62 (diff) | |
py/asm: Fix x86 and ARM assemblers due to recent code refactoring.
Diffstat (limited to 'py/asmarm.c')
| -rw-r--r-- | py/asmarm.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/py/asmarm.c b/py/asmarm.c index 63963d2c0..56e05cf56 100644 --- a/py/asmarm.c +++ b/py/asmarm.c @@ -39,7 +39,7 @@ #define SIGNED_FIT24(x) (((x) & 0xff800000) == 0) || (((x) & 0xff000000) == 0xff000000) void asm_arm_end_pass(asm_arm_t *as) { - if (as->pass == ASM_ARM_PASS_EMIT) { + if (as->base.pass == ASM_ARM_PASS_EMIT) { #ifdef __arm__ // flush I- and D-cache asm volatile( @@ -333,9 +333,9 @@ void asm_arm_strb_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn) { } void asm_arm_bcc_label(asm_arm_t *as, int cond, uint label) { - assert(label < as->max_num_labels); - mp_uint_t dest = as->label_offsets[label]; - mp_int_t rel = dest - as->code_offset; + assert(label < as->base.max_num_labels); + mp_uint_t dest = as->base.label_offsets[label]; + mp_int_t rel = dest - as->base.code_offset; rel -= 8; // account for instruction prefetch, PC is 8 bytes ahead of this instruction rel >>= 2; // in ARM mode the branch target is 32-bit aligned, so the 2 LSB are omitted |