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| author | Damien George <damien@micropython.org> | 2022-11-11 12:25:32 +1100 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2022-11-11 12:25:32 +1100 |
| commit | 0698dd72ea3b9d7897e63c6e219061bff8d162cf (patch) | |
| tree | b2452d489b6a131a53058eaa2d160ed65f5334ef /py/emitnative.c | |
| parent | 451ded8d7b746bf73a1f4a4db500716cb7587257 (diff) | |
py/emitnative: Ensure load_subscr does not clobber existing REG_ARG_2.
Follow up from a similar fix in 426785a19eeb12aef7383fbda4693575d8c4dddf
Fixes issue #6314.
Signed-off-by: Damien George <damien@micropython.org>
Diffstat (limited to 'py/emitnative.c')
| -rw-r--r-- | py/emitnative.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/py/emitnative.c b/py/emitnative.c index 7e98ba155..2d694983b 100644 --- a/py/emitnative.c +++ b/py/emitnative.c @@ -1527,6 +1527,7 @@ STATIC void emit_native_load_subscr(emit_t *emit) { break; } #endif + need_reg_single(emit, reg_index, 0); ASM_MOV_REG_IMM(emit->as, reg_index, index_value); ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add index to base reg_base = reg_index; @@ -1544,6 +1545,7 @@ STATIC void emit_native_load_subscr(emit_t *emit) { break; } #endif + need_reg_single(emit, reg_index, 0); ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 1); ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 2*index to base reg_base = reg_index; @@ -1561,6 +1563,7 @@ STATIC void emit_native_load_subscr(emit_t *emit) { break; } #endif + need_reg_single(emit, reg_index, 0); ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 2); ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 4*index to base reg_base = reg_index; |