diff options
| author | Alessandro Gatti <a.gatti@frob.it> | 2025-05-22 13:38:36 +0200 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2025-06-10 11:29:02 +1000 |
| commit | 84ad2c6cd04a1c51d706f9b25b81cad52c6c5802 (patch) | |
| tree | d8f879c273932ee665ba3ab76d5196b1cb68ca22 /py/emitnative.c | |
| parent | 1f5ba6998bb1895354f5afcd7bb52d83a02733be (diff) | |
py/asmxtensa: Extend existing specialised load/store operations range.
This commit updates the existing specialised implementations for
int-indexed 32-bit load and store operations, and adds a specialised
implementation for int-indexed 16-bit load.
The 32-bit operations relied on the fact that their applicability was
limited to a specific range, falling back on a generic implementation
otherwise. Introducing a single entry point for each int-indexed
load/store operation size would break that assumption. Now those two
operations contain fallback code to generate working code by themselves
instead of raising an exception.
The 16-bit operation instead simply did not have any range check, but it
was not exposed directly to the Viper emitter. When a 16-bit
int-indexed load entry point was introduced, the existing implementation
would fail when accessing memory outside its 0..255 halfwords range. A
specialised implementation is now present, performing fewer operations
than the existing Viper emitter equivalent.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
Diffstat (limited to 'py/emitnative.c')
| -rw-r--r-- | py/emitnative.c | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/py/emitnative.c b/py/emitnative.c index c1965fc91..dba9c7169 100644 --- a/py/emitnative.c +++ b/py/emitnative.c @@ -1572,11 +1572,6 @@ static void emit_native_load_subscr(emit_t *emit) { asm_rv32_opcode_lhu(emit->as, REG_RET, reg_base, index_value << 1); break; } - #elif N_XTENSA || N_XTENSAWIN - if (index_value >= 0 && index_value < 256) { - asm_xtensa_op_l16ui(emit->as, REG_RET, reg_base, index_value); - break; - } #endif if (index_value != 0) { // index is a non-zero immediate @@ -1599,11 +1594,6 @@ static void emit_native_load_subscr(emit_t *emit) { asm_rv32_opcode_lw(emit->as, REG_RET, reg_base, index_value << 2); break; } - #elif N_XTENSA || N_XTENSAWIN - if (index_value >= 0 && index_value < 256) { - asm_xtensa_l32i_optimised(emit->as, REG_RET, reg_base, index_value); - break; - } #endif if (index_value != 0) { // index is a non-zero immediate @@ -1870,11 +1860,6 @@ static void emit_native_store_subscr(emit_t *emit) { asm_rv32_opcode_sw(emit->as, reg_value, reg_base, index_value << 2); break; } - #elif N_XTENSA || N_XTENSAWIN - if (index_value >= 0 && index_value < 256) { - asm_xtensa_s32i_optimised(emit->as, reg_value, reg_base, index_value); - break; - } #endif if (index_value != 0) { // index is a non-zero immediate |