diff options
| author | Alessandro Gatti <a.gatti@frob.it> | 2025-05-22 14:37:21 +0200 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2025-06-10 11:29:02 +1000 |
| commit | bbab2e98f5d82b3111544d26e600af592977c0c3 (patch) | |
| tree | 6c6e11dbcea2907e4d0da99dc2a8e81c7d410082 /py/emitnative.c | |
| parent | 901c96dc554100513523cc9136161126e8cda436 (diff) | |
py/asmarm: Extend int-indexed 32-bit load/store offset ranges.
This commit extends the range for int-indexed load/store opcode
generators, making them emit correct code sequences for offsets that
span more than 12 bits.
This is necessary due to those generator bits being also used in the
Viper emitter, where it's more probable to reference offsets that can
not be embedded in the LDR/STR opcodes.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
Diffstat (limited to 'py/emitnative.c')
| -rw-r--r-- | py/emitnative.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/py/emitnative.c b/py/emitnative.c index 8ac9810c8..7662de69e 100644 --- a/py/emitnative.c +++ b/py/emitnative.c @@ -1845,11 +1845,6 @@ static void emit_native_store_subscr(emit_t *emit) { #else if (index_value != 0) { // index is a non-zero immediate - #if N_ARM - ASM_MOV_REG_IMM(emit->as, reg_index, index_value); - asm_arm_str_reg_reg_reg(emit->as, reg_value, reg_base, reg_index); - break; - #endif ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 2); ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 4*index to base reg_base = reg_index; |