diff options
author | Alessandro Gatti <a.gatti@frob.it> | 2025-06-10 19:24:10 +0200 |
---|---|---|
committer | Damien George <damien@micropython.org> | 2025-07-01 15:34:29 +1000 |
commit | cd1b921bf296da72cee4f6135ad8bd74e6217d2f (patch) | |
tree | 2a17ff35d4b34be3755cffb1a7c6fc607f9101e7 /py/emitnative.c | |
parent | a8e036982677077e27ab3bdfb0792a8de14f8b77 (diff) |
py/asmarm: Implement the full set of Viper load/store operations.
This commit expands the implementation of Viper load/store operations
that are optimised for the Arm platform.
Now both load and store emitters should generate the shortest possible
sequence in all cases. Redundant specialised operation emitters have
been folded into the general case implementation - this was the case of
integer-indexed load/store operations with a fixed offset of zero.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
Diffstat (limited to 'py/emitnative.c')
-rw-r--r-- | py/emitnative.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/py/emitnative.c b/py/emitnative.c index 2cce31dae..36e9719db 100644 --- a/py/emitnative.c +++ b/py/emitnative.c @@ -1785,10 +1785,6 @@ static void emit_native_store_subscr(emit_t *emit) { if (index_value != 0) { // index is non-zero ASM_MOV_REG_IMM(emit->as, reg_index, index_value); - #if N_ARM - asm_arm_strb_reg_reg_reg(emit->as, reg_value, reg_base, reg_index); - break; - #endif ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add index to base reg_base = reg_index; } |