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authorDamien George <damien.p.george@gmail.com>2014-08-06 22:33:31 +0100
committerDamien George <damien.p.george@gmail.com>2014-08-06 22:33:31 +0100
commit3ef911345c94a6d612ab50c1e912e81cb2cc3f71 (patch)
tree9425ff491cd738a3f6ae11028e1834925ea746e2 /stmhal/hal/src/stm32f4xx_hal_eth.c
parent8a11d693cf794c8cc276a5715df11ecdc8824ef1 (diff)
stmhal: Update STM32Cube F4 HAL driver to V1.3.0.
This patch updates ST's HAL to the latest version, V1.3.0, dated 19 June 2014. Files were copied verbatim from the ST package. Only change was to suppress compiler warning of unused variables in 4 places. A lot of the changes from ST are cosmetic: comments and white space. Some small code changes here and there, and addition of F411 header. Main code change is how SysTick interrupt is set: it now has a configuration variable to set the priority, so we no longer need to work around this (originall in system_stm32f4xx.c).
Diffstat (limited to 'stmhal/hal/src/stm32f4xx_hal_eth.c')
-rw-r--r--stmhal/hal/src/stm32f4xx_hal_eth.c247
1 files changed, 153 insertions, 94 deletions
diff --git a/stmhal/hal/src/stm32f4xx_hal_eth.c b/stmhal/hal/src/stm32f4xx_hal_eth.c
index 4832aa2db..739760242 100644
--- a/stmhal/hal/src/stm32f4xx_hal_eth.c
+++ b/stmhal/hal/src/stm32f4xx_hal_eth.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f4xx_hal_eth.c
* @author MCD Application Team
- * @version V1.0.0
- * @date 18-February-2014
+ * @version V1.1.0
+ * @date 19-June-2014
* @brief ETH HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Ethernet (ETH) peripheral:
@@ -113,6 +113,9 @@
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
+#define LINKED_STATE_TIMEOUT_VALUE ((uint32_t)2000) /* 2000 ms */
+#define AUTONEGO_COMPLETED_TIMEOUT_VALUE ((uint32_t)1000) /* 1000 ms */
+
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
@@ -152,14 +155,15 @@ static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth);
/**
* @brief Initializes the Ethernet MAC and DMA according to default
* parameters.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
{
uint32_t tmpreg = 0, phyreg = 0;
uint32_t hclk = 60000000;
- uint32_t timeout = 0;
+ uint32_t tickstart = 0;
uint32_t err = ETH_SUCCESS;
/* Check the ETH peripheral state */
@@ -258,30 +262,32 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
if((heth->Init).AutoNegotiation != ETH_AUTONEGOTIATION_DISABLE)
{
+ /* Get tick */
+ tickstart = HAL_GetTick();
+
/* We wait for linked status */
do
{
- timeout++;
HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg);
- } while (((phyreg & PHY_LINKED_STATUS) != PHY_LINKED_STATUS) && (timeout < PHY_READ_TO));
-
- if(timeout == PHY_READ_TO)
- {
- /* In case of write timeout */
- err = ETH_ERROR;
- /* Config MAC and DMA */
- ETH_MACDMAConfig(heth, err);
-
- /* Set the ETH peripheral state to READY */
- heth->State = HAL_ETH_STATE_READY;
+ /* Check for the Timeout */
+ if((HAL_GetTick() - tickstart ) > LINKED_STATE_TIMEOUT_VALUE)
+ {
+ /* In case of write timeout */
+ err = ETH_ERROR;
- /* Return HAL_ERROR */
- return HAL_ERROR;
- }
+ /* Config MAC and DMA */
+ ETH_MACDMAConfig(heth, err);
+
+ heth->State= HAL_ETH_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(heth);
- /* Reset Timeout counter */
- timeout = 0;
+ return HAL_TIMEOUT;
+ }
+ } while (((phyreg & PHY_LINKED_STATUS) != PHY_LINKED_STATUS));
+
/* Enable Auto-Negotiation */
if((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_AUTONEGOTIATION)) != HAL_OK)
@@ -299,16 +305,37 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
return HAL_ERROR;
}
+ /* Get tick */
+ tickstart = HAL_GetTick();
+
/* Wait until the auto-negotiation will be completed */
do
{
- timeout++;
HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg);
- } while (((phyreg & PHY_AUTONEGO_COMPLETE) != PHY_AUTONEGO_COMPLETE) && (timeout < PHY_READ_TO));
+
+ /* Check for the Timeout */
+ if((HAL_GetTick() - tickstart ) > AUTONEGO_COMPLETED_TIMEOUT_VALUE)
+ {
+ /* In case of write timeout */
+ err = ETH_ERROR;
+
+ /* Config MAC and DMA */
+ ETH_MACDMAConfig(heth, err);
+
+ heth->State= HAL_ETH_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(heth);
- if(timeout == PHY_READ_TO)
+ return HAL_TIMEOUT;
+ }
+
+ } while (((phyreg & PHY_AUTONEGO_COMPLETE) != PHY_AUTONEGO_COMPLETE));
+
+ /* Read the result of the auto-negotiation */
+ if((HAL_ETH_ReadPHYRegister(heth, PHY_SR, &phyreg)) != HAL_OK)
{
- /* In case of timeout */
+ /* In case of write timeout */
err = ETH_ERROR;
/* Config MAC and DMA */
@@ -318,15 +345,9 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
heth->State = HAL_ETH_STATE_READY;
/* Return HAL_ERROR */
- return HAL_ERROR;
+ return HAL_ERROR;
}
- /* Reset Timeout counter */
- timeout = 0;
-
- /* Read the result of the auto-negotiation */
- HAL_ETH_ReadPHYRegister(heth, PHY_SR, &phyreg);
-
/* Configure the MAC with the Duplex Mode fixed by the auto-negotiation process */
if((phyreg & PHY_DUPLEX_STATUS) != (uint32_t)RESET)
{
@@ -389,7 +410,8 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
/**
* @brief De-Initializes the ETH peripheral.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth)
@@ -412,7 +434,8 @@ HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth)
/**
* @brief Initializes the DMA Tx descriptors in chain mode.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @param DMATxDescTab: Pointer to the first Tx desc list
* @param TxBuff: Pointer to the first TxBuffer list
* @param TxBuffCount: Number of the used Tx desc in the list
@@ -478,7 +501,8 @@ HAL_StatusTypeDef HAL_ETH_DMATxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADesc
/**
* @brief Initializes the DMA Rx descriptors in chain mode.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @param DMARxDescTab: Pointer to the first Rx desc list
* @param RxBuff: Pointer to the first RxBuffer list
* @param RxBuffCount: Number of the used Rx desc in the list
@@ -547,7 +571,8 @@ HAL_StatusTypeDef HAL_ETH_DMARxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADesc
/**
* @brief Initializes the ETH MSP.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
__weak void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
@@ -559,7 +584,8 @@ __weak void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
/**
* @brief DeInitializes ETH MSP.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
__weak void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
@@ -588,7 +614,7 @@ __weak void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
HAL_ETH_GetReceivedFrame_IT();
(+) Read from an External PHY register
HAL_ETH_ReadPHYRegister();
- (+) Writo to an External PHY register
+ (+) Write to an External PHY register
HAL_ETH_WritePHYRegister();
@endverbatim
@@ -598,7 +624,8 @@ __weak void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
/**
* @brief Sends an Ethernet frame.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @param FrameLength: Amount of data to be sent
* @retval HAL status
*/
@@ -711,7 +738,8 @@ HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameL
/**
* @brief Checks for received frames.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth)
@@ -784,12 +812,14 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth)
/* Process Unlocked */
__HAL_UNLOCK(heth);
+ /* Return function status */
return HAL_ERROR;
}
/**
* @brief Gets the Received frame in interrupt mode.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth)
@@ -868,12 +898,13 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth)
__HAL_UNLOCK(heth);
/* Return function status */
- return HAL_OK;
+ return HAL_ERROR;
}
/**
* @brief This function handles ETH interrupt request.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval HAL status
*/
void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth)
@@ -932,7 +963,8 @@ void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth)
/**
* @brief Tx Transfer completed callbacks.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
__weak void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth)
@@ -944,7 +976,8 @@ __weak void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth)
/**
* @brief Rx Transfer completed callbacks.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
__weak void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
@@ -956,7 +989,8 @@ __weak void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
/**
* @brief Ethernet transfer error callbacks
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
__weak void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
@@ -968,20 +1002,20 @@ __weak void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
/**
* @brief Reads a PHY register
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @param PHYReg: PHY register address, is the index of one of the 32 PHY register.
* This parameter can be one of the following values:
- * @arg PHY_BCR: Transceiver Basic Control Register
- * @arg PHY_BSR: Transceiver Basic Status Register
- * @arg More PHY register could be read depending on the used PHY
+ * PHY_BCR: Transceiver Basic Control Register,
+ * PHY_BSR: Transceiver Basic Status Register.
+ * More PHY register could be read depending on the used PHY
* @param RegValue: PHY register value
- * @retval HAL_TIMEOUT: in case of timeout
- * MACMIIDR register value: Data read from the selected PHY register (correct read )
+ * @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t *RegValue)
{
uint32_t tmpreg = 0;
- uint32_t timeout = 0;
+ uint32_t tickstart = 0;
/* Check parameters */
assert_param(IS_ETH_PHY_ADDRESS(heth->Init.PhyAddress));
@@ -1009,20 +1043,24 @@ HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYR
/* Write the result value into the MII Address register */
heth->Instance->MACMIIAR = tmpreg;
+ /* Get tick */
+ tickstart = HAL_GetTick();
+
/* Check for the Busy flag */
- do
+ while((tmpreg & ETH_MACMIIAR_MB) == ETH_MACMIIAR_MB)
{
- timeout++;
- tmpreg = heth->Instance->MACMIIAR;
- } while (((tmpreg & ETH_MACMIIAR_MB) == ETH_MACMIIAR_MB) && (timeout < PHY_READ_TO));
+ /* Check for the Timeout */
+ if((HAL_GetTick() - tickstart ) > PHY_READ_TO)
+ {
+ heth->State= HAL_ETH_STATE_READY;
- /* Return ERROR in case of timeout */
- if(timeout == PHY_READ_TO)
- {
- /* Set ETH HAL State to READY */
- heth->State = HAL_ETH_STATE_READY;
- /* Return HAL_TIMEOUT */
- return HAL_TIMEOUT;
+ /* Process Unlocked */
+ __HAL_UNLOCK(heth);
+
+ return HAL_TIMEOUT;
+ }
+
+ tmpreg = heth->Instance->MACMIIAR;
}
/* Get MACMIIDR value */
@@ -1037,18 +1075,19 @@ HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYR
/**
* @brief Writes to a PHY register.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @param PHYReg: PHY register address, is the index of one of the 32 PHY register.
* This parameter can be one of the following values:
- * @arg PHY_BCR: Transceiver Control Register
- * @arg More PHY register could be written depending on the used PHY
+ * PHY_BCR: Transceiver Control Register.
+ * More PHY register could be written depending on the used PHY
* @param RegValue: the value to write
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t RegValue)
{
uint32_t tmpreg = 0;
- uint32_t timeout = 0;
+ uint32_t tickstart = 0;
/* Check parameters */
assert_param(IS_ETH_PHY_ADDRESS(heth->Init.PhyAddress));
@@ -1079,20 +1118,24 @@ HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint16_t PHY
/* Write the result value into the MII Address register */
heth->Instance->MACMIIAR = tmpreg;
+ /* Get tick */
+ tickstart = HAL_GetTick();
+
/* Check for the Busy flag */
- do
+ while((tmpreg & ETH_MACMIIAR_MB) == ETH_MACMIIAR_MB)
{
- timeout++;
- tmpreg = heth->Instance->MACMIIAR;
- } while (((tmpreg & ETH_MACMIIAR_MB) == ETH_MACMIIAR_MB) && (timeout < PHY_WRITE_TO));
+ /* Check for the Timeout */
+ if((HAL_GetTick() - tickstart ) > PHY_WRITE_TO)
+ {
+ heth->State= HAL_ETH_STATE_READY;
- /* Return TIMETOUT in case of timeout */
- if(timeout == PHY_WRITE_TO)
- {
- /* Set ETH HAL State to READY */
- heth->State = HAL_ETH_STATE_READY;
+ /* Process Unlocked */
+ __HAL_UNLOCK(heth);
- return HAL_TIMEOUT;
+ return HAL_TIMEOUT;
+ }
+
+ tmpreg = heth->Instance->MACMIIAR;
}
/* Set ETH HAL State to READY */
@@ -1129,7 +1172,8 @@ HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint16_t PHY
/**
* @brief Enables Ethernet MAC and DMA reception/transmission
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth)
@@ -1167,7 +1211,8 @@ HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth)
/**
* @brief Stop Ethernet MAC and DMA reception/transmission
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth)
@@ -1205,7 +1250,8 @@ HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth)
/**
* @brief Set ETH MAC Configuration.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @param macconf: MAC Configuration structure
* @retval HAL status
*/
@@ -1371,7 +1417,8 @@ HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef
/**
* @brief Sets ETH DMA Configuration.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @param dmaconf: DMA Configuration structure
* @retval HAL status
*/
@@ -1478,7 +1525,8 @@ HAL_StatusTypeDef HAL_ETH_ConfigDMA(ETH_HandleTypeDef *heth, ETH_DMAInitTypeDef
/**
* @brief Return the ETH HAL state
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval HAL state
*/
HAL_ETH_StateTypeDef HAL_ETH_GetState(ETH_HandleTypeDef *heth)
@@ -1493,7 +1541,8 @@ HAL_ETH_StateTypeDef HAL_ETH_GetState(ETH_HandleTypeDef *heth)
/**
* @brief Configures Ethernet MAC and DMA with default parameters.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @param err: Ethernet Init error
* @retval HAL status
*/
@@ -1749,7 +1798,8 @@ static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth, uint32_t err)
/**
* @brief Configures the selected MAC address.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @param MacAddr: The MAC address to configure
* This parameter can be one of the following values:
* @arg ETH_MAC_Address0: MAC Address0
@@ -1779,7 +1829,8 @@ static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint
/**
* @brief Enables the MAC transmission.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
static void ETH_MACTransmissionEnable(ETH_HandleTypeDef *heth)
@@ -1798,7 +1849,8 @@ static void ETH_MACTransmissionEnable(ETH_HandleTypeDef *heth)
/**
* @brief Disables the MAC transmission.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
static void ETH_MACTransmissionDisable(ETH_HandleTypeDef *heth)
@@ -1817,7 +1869,8 @@ static void ETH_MACTransmissionDisable(ETH_HandleTypeDef *heth)
/**
* @brief Enables the MAC reception.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
static void ETH_MACReceptionEnable(ETH_HandleTypeDef *heth)
@@ -1836,7 +1889,8 @@ static void ETH_MACReceptionEnable(ETH_HandleTypeDef *heth)
/**
* @brief Disables the MAC reception.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
static void ETH_MACReceptionDisable(ETH_HandleTypeDef *heth)
@@ -1855,7 +1909,8 @@ static void ETH_MACReceptionDisable(ETH_HandleTypeDef *heth)
/**
* @brief Enables the DMA transmission.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
static void ETH_DMATransmissionEnable(ETH_HandleTypeDef *heth)
@@ -1866,7 +1921,8 @@ static void ETH_DMATransmissionEnable(ETH_HandleTypeDef *heth)
/**
* @brief Disables the DMA transmission.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
static void ETH_DMATransmissionDisable(ETH_HandleTypeDef *heth)
@@ -1877,7 +1933,8 @@ static void ETH_DMATransmissionDisable(ETH_HandleTypeDef *heth)
/**
* @brief Enables the DMA reception.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
static void ETH_DMAReceptionEnable(ETH_HandleTypeDef *heth)
@@ -1888,7 +1945,8 @@ static void ETH_DMAReceptionEnable(ETH_HandleTypeDef *heth)
/**
* @brief Disables the DMA reception.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
static void ETH_DMAReceptionDisable(ETH_HandleTypeDef *heth)
@@ -1899,7 +1957,8 @@ static void ETH_DMAReceptionDisable(ETH_HandleTypeDef *heth)
/**
* @brief Clears the ETHERNET transmit FIFO.
- * @param heth: ETH handle
+ * @param heth: pointer to a ETH_HandleTypeDef structure that contains
+ * the configuration information for ETHERNET module
* @retval None
*/
static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth)