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| author | Angus Gratton <angus@redyak.com.au> | 2025-08-06 15:57:38 +1000 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2025-08-07 16:55:46 +1000 |
| commit | 593ae04eeb06b6fd7c6232eb41912b8d26170ddd (patch) | |
| tree | 1a8cac3a8a553efebe16c1f0bf7f01846cb02880 /tests/inlineasm/rv32/asmshift.py | |
| parent | ce109af712452474dfe3864f82b5430f4e2a5ff0 (diff) | |
esp32/machine_timer: Fix machine.Timer() tick frequency on ESP32C2,C6.HEADorigin/masterorigin/HEADmaster
Also future-proofs this code for other chips. Apart form C6 and C2, all
currently supported chips use APB clock for GPTIMER_CLK_SRC_DEFAULT.
ESP32-C2 uses 40MHz PLL but APB_CLK_FREQ was 26MHz.
ESP32-C6 uses 80MHz PLL but APB_CLK_FREQ was 40MHz.
Implementation now gets the correct frequency from ESP-IDF.
This work was funded through GitHub Sponsors.
Signed-off-by: Angus Gratton <angus@redyak.com.au>
Diffstat (limited to 'tests/inlineasm/rv32/asmshift.py')
0 files changed, 0 insertions, 0 deletions