diff options
author | Alessandro Gatti <a.gatti@frob.it> | 2024-08-25 16:28:35 +0200 |
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committer | Damien George <damien@micropython.org> | 2025-01-02 11:49:10 +1100 |
commit | 268acb714dd79fa5eeeb82c1fca022bc4ea126b7 (patch) | |
tree | 428ed75070ee89847fd5087095e3d7331d5f9b26 /tests/inlineasm/rv32/asmshift.py | |
parent | 3044233ea3726e9d8727d8f6a76f32c48e6fae5e (diff) |
py/emitinlinerv32: Add inline assembler support for RV32.
This commit adds support for writing inline assembler functions when
targeting a RV32IMC processor.
Given that this takes up a bit of rodata space due to its large
instruction decoding table and its extensive error messages, it is
enabled by default only on offline targets such as mpy-cross and the
qemu port.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
Diffstat (limited to 'tests/inlineasm/rv32/asmshift.py')
-rw-r--r-- | tests/inlineasm/rv32/asmshift.py | 121 |
1 files changed, 121 insertions, 0 deletions
diff --git a/tests/inlineasm/rv32/asmshift.py b/tests/inlineasm/rv32/asmshift.py new file mode 100644 index 000000000..89a231f4d --- /dev/null +++ b/tests/inlineasm/rv32/asmshift.py @@ -0,0 +1,121 @@ +@micropython.asm_rv32 +def lsl1(a0): + slli(a0, a0, 1) + + +print(hex(lsl1(0x123))) + + +@micropython.asm_rv32 +def lsl23(a0): + slli(a0, a0, 23) + + +print(hex(lsl23(1))) + + +@micropython.asm_rv32 +def lsr1(a0): + srli(a0, a0, 1) + + +print(hex(lsr1(0x123))) + + +@micropython.asm_rv32 +def lsr31(a0): + srli(a0, a0, 31) + + +print(hex(lsr31(0x80000000))) + + +@micropython.asm_rv32 +def asr1(a0): + srai(a0, a0, 1) + + +print(hex(asr1(0x123))) + + +@micropython.asm_rv32 +def asr31(a0): + srai(a0, a0, 31) + + +print(hex(asr31(0x80000000))) + + +@micropython.asm_rv32 +def clsl1(a0): + c_slli(a0, 1) + + +print(hex(clsl1(0x123))) + + +@micropython.asm_rv32 +def clsl23(a0): + c_slli(a0, 23) + + +print(hex(clsl23(1))) + + +@micropython.asm_rv32 +def clsr1(a0): + c_srli(a0, 1) + + +print(hex(clsr1(0x123))) + + +@micropython.asm_rv32 +def clsr31(a0): + c_srli(a0, 31) + + +print(hex(clsr31(0x80000000))) + + +@micropython.asm_rv32 +def casr1(a0): + c_srai(a0, 1) + + +print(hex(casr1(0x123))) + + +@micropython.asm_rv32 +def casr31(a0): + c_srai(a0, 31) + + +print(hex(casr31(0x80000000))) + + +@micropython.asm_rv32 +def lsl1r(a0): + li(a1, 1) + sll(a0, a0, a1) + + +print(hex(lsl1r(0x123))) + + +@micropython.asm_rv32 +def lsr1r(a0): + li(a1, 1) + srl(a0, a0, a1) + + +print(hex(lsr1r(0x123))) + + +@micropython.asm_rv32 +def asr1r(a0): + li(a1, 1) + sra(a0, a0, a1) + + +print(hex(asr1r(0x123))) |