summaryrefslogtreecommitdiff
path: root/tests/wipy/timer.py
diff options
context:
space:
mode:
authorDamien George <damien@micropython.org>2024-01-18 16:32:31 +1100
committerDamien George <damien@micropython.org>2024-01-22 11:48:27 +1100
commit7bbcee3cf09a08199b3ffefb6c5e37208cba5f0a (patch)
tree6260794d34aaef18fcf5a6521ff3d103bc962dbf /tests/wipy/timer.py
parentf93ffc2875c57ce3b8a608ebf5ae9050aa62f069 (diff)
tests: Move port-specific test directories into tests/ports/ directory.
To keep them all together, mirroring the top-level directory structure. Signed-off-by: Damien George <damien@micropython.org>
Diffstat (limited to 'tests/wipy/timer.py')
-rw-r--r--tests/wipy/timer.py118
1 files changed, 0 insertions, 118 deletions
diff --git a/tests/wipy/timer.py b/tests/wipy/timer.py
deleted file mode 100644
index db25870db..000000000
--- a/tests/wipy/timer.py
+++ /dev/null
@@ -1,118 +0,0 @@
-"""
-Timer test for the CC3200 based boards.
-"""
-
-from machine import Timer
-import os
-import time
-
-mch = os.uname().machine
-if "LaunchPad" in mch:
- pwm_pin = "GP24"
-elif "WiPy" in mch:
- pwm_pin = "GP24"
-else:
- raise Exception("Board not supported!")
-
-for i in range(4):
- tim = Timer(i, mode=Timer.PERIODIC)
- print(tim)
- ch = tim.channel(Timer.A, freq=5)
- print(ch)
- ch = tim.channel(Timer.B, freq=5)
- print(ch)
- tim = Timer(i, mode=Timer.ONE_SHOT)
- print(tim)
- ch = tim.channel(Timer.A, freq=50)
- print(ch)
- ch = tim.channel(Timer.B, freq=50)
- print(ch)
- tim = Timer(i, mode=Timer.PWM)
- print(tim)
- ch = tim.channel(Timer.A, freq=50000, duty_cycle=2000, polarity=Timer.POSITIVE)
- print(ch)
- ch = tim.channel(Timer.B, freq=50000, duty_cycle=8000, polarity=Timer.NEGATIVE)
- print(ch)
- tim.deinit()
- print(tim)
-
-for i in range(4):
- tim = Timer(i, mode=Timer.PERIODIC)
- tim.deinit()
-
-
-class TimerTest:
- def __init__(self):
- self.tim = Timer(0, mode=Timer.PERIODIC)
- self.int_count = 0
-
- def timer_isr(self, tim_ch):
- self.int_count += 1
-
-
-timer_test = TimerTest()
-ch = timer_test.tim.channel(Timer.A, freq=5)
-print(ch.freq() == 5)
-ch.irq(handler=timer_test.timer_isr, trigger=Timer.TIMEOUT)
-time.sleep_ms(1001)
-print(timer_test.int_count == 5)
-
-ch.freq(100)
-timer_test.int_count = 0
-time.sleep_ms(1001)
-print(timer_test.int_count == 100)
-
-ch.freq(1000)
-time.sleep_ms(1500)
-timer_test.int_count = 0
-time.sleep_ms(2000)
-print(timer_test.int_count == 2000)
-
-timer_test.tim.deinit()
-timer_test.tim.init(mode=Timer.ONE_SHOT)
-ch = timer_test.tim.channel(Timer.A, period=100000)
-ch.irq(handler=timer_test.timer_isr, trigger=Timer.TIMEOUT)
-timer_test.int_count = 0
-time.sleep_ms(101)
-print(timer_test.int_count == 1)
-time.sleep_ms(101)
-print(timer_test.int_count == 1)
-timer_test.tim.deinit()
-print(timer_test.tim)
-
-# 32 bit modes
-tim = Timer(0, mode=Timer.PERIODIC, width=32)
-ch = tim.channel(Timer.A | Timer.B, period=5000000)
-
-# check for memory leaks...
-for i in range(1000):
- tim = Timer(0, mode=Timer.PERIODIC)
- ch = tim.channel(Timer.A, freq=5)
-
-# next ones must fail
-try:
- tim = Timer(0, mode=12)
-except:
- print("Exception")
-
-try:
- tim = Timer(4, mode=Timer.ONE_SHOT)
-except:
- print("Exception")
-
-try:
- tim = Timer(0, mode=Timer.PWM, width=32)
-except:
- print("Exception")
-
-tim = Timer(0, mode=Timer.PWM)
-
-try:
- ch = tim.channel(TIMER_A | TIMER_B, freq=10)
-except:
- print("Exception")
-
-try:
- ch = tim.channel(TIMER_A, freq=4)
-except:
- print("Exception")