diff options
| -rw-r--r-- | ports/mimxrt/machine_bitstream.c | 2 | ||||
| -rw-r--r-- | ports/mimxrt/mphalport.h | 5 | ||||
| -rw-r--r-- | ports/mimxrt/ticks.c | 1 |
3 files changed, 6 insertions, 2 deletions
diff --git a/ports/mimxrt/machine_bitstream.c b/ports/mimxrt/machine_bitstream.c index c6ff469ea..cb391a38c 100644 --- a/ports/mimxrt/machine_bitstream.c +++ b/ports/mimxrt/machine_bitstream.c @@ -48,7 +48,7 @@ void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const } } // Enable the CPU cycle counter, which is not always enabled. - mp_hal_ticks_cpu_init(); + mp_hal_ticks_cpu_enable(); uint32_t irq_state = mp_hal_quiet_timing_enter(); diff --git a/ports/mimxrt/mphalport.h b/ports/mimxrt/mphalport.h index a98ae5ed7..40e929b23 100644 --- a/ports/mimxrt/mphalport.h +++ b/ports/mimxrt/mphalport.h @@ -75,7 +75,10 @@ static inline void mp_hal_delay_us(mp_uint_t us) { #define mp_hal_delay_us_fast(us) mp_hal_delay_us(us) -static inline void mp_hal_ticks_cpu_init(void) { +static inline void mp_hal_ticks_cpu_enable(void) { + CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; + DWT->LAR = 0xc5acce55; + DWT->CYCCNT = 0; DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; } diff --git a/ports/mimxrt/ticks.c b/ports/mimxrt/ticks.c index 676f81b30..a5ee10242 100644 --- a/ports/mimxrt/ticks.c +++ b/ports/mimxrt/ticks.c @@ -56,6 +56,7 @@ void ticks_init(void) { NVIC_EnableIRQ(GPTx_IRQn); GPT_StartTimer(GPTx); + mp_hal_ticks_cpu_enable(); } void GPTx_IRQHandler(void) { |