diff options
Diffstat (limited to 'ports/stm32/powerctrlboot.c')
| -rw-r--r-- | ports/stm32/powerctrlboot.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/ports/stm32/powerctrlboot.c b/ports/stm32/powerctrlboot.c index 2354deb4d..a8ef8c34a 100644 --- a/ports/stm32/powerctrlboot.c +++ b/ports/stm32/powerctrlboot.c @@ -145,17 +145,12 @@ void SystemClock_Config(void) { } // Use the PLL to get a 64MHz SYSCLK - #define PLLM (HSI_VALUE / 16000000) // input is 8MHz - #define PLLN (8) // 8*16MHz = 128MHz - #define PLLP (2) // f_P = 64MHz - #define PLLQ (2) // f_Q = 64MHz - #define PLLR (2) // f_R = 64MHz RCC->PLLCFGR = - (PLLP - 1) << RCC_PLLCFGR_PLLP_Pos | RCC_PLLCFGR_PLLPEN - | (PLLQ - 1) << RCC_PLLCFGR_PLLQ_Pos | RCC_PLLCFGR_PLLQEN - | (PLLR - 1) << RCC_PLLCFGR_PLLR_Pos | RCC_PLLCFGR_PLLREN - | PLLN << RCC_PLLCFGR_PLLN_Pos - | (PLLM - 1) << RCC_PLLCFGR_PLLM_Pos + (MICROPY_HW_CLK_PLLP - 1) << RCC_PLLCFGR_PLLP_Pos | RCC_PLLCFGR_PLLPEN + | (MICROPY_HW_CLK_PLLQ - 1) << RCC_PLLCFGR_PLLQ_Pos | RCC_PLLCFGR_PLLQEN + | (MICROPY_HW_CLK_PLLR - 1) << RCC_PLLCFGR_PLLR_Pos | RCC_PLLCFGR_PLLREN + | MICROPY_HW_CLK_PLLN << RCC_PLLCFGR_PLLN_Pos + | (MICROPY_HW_CLK_PLLM - 1) << RCC_PLLCFGR_PLLM_Pos | RCC_PLLCFGR_PLLSRC_HSI; #else |