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authorTom Lane <tgl@sss.pgh.pa.us>2012-01-01 22:39:59 -0500
committerTom Lane <tgl@sss.pgh.pa.us>2012-01-02 00:02:00 -0500
commit5cfa8dd3007d7e953c6a03b0fa2215d97c581b0c (patch)
tree39ee2902ec30be8467b91a25f3f02c7a89f70507 /src/include/storage/s_lock.h
parent6b6137e4efebcd767a349099b3e048fbc7755cca (diff)
Use mutex hint bit in PPC LWARX instructions, where possible.
The hint bit makes for a small but measurable performance improvement in access to contended spinlocks. On the other hand, some PPC chips give an illegal-instruction failure. There doesn't seem to be a completely bulletproof way to tell whether the hint bit will cause an illegal-instruction failure other than by trying it; but most if not all 64-bit PPC machines should accept it, so follow the Linux kernel's lead and assume it's okay to use it in 64-bit builds. Of course we must also check whether the assembler accepts the command, since even with a recent CPU the toolchain could be old. Patch by Manabu Ori, significantly modified by me.
Diffstat (limited to 'src/include/storage/s_lock.h')
-rw-r--r--src/include/storage/s_lock.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index 98c12db3ab3..cc67be81eb3 100644
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -372,7 +372,11 @@ tas(volatile slock_t *lock)
int _res;
__asm__ __volatile__(
+#ifdef USE_PPC_LWARX_MUTEX_HINT
+" lwarx %0,0,%3,1 \n"
+#else
" lwarx %0,0,%3 \n"
+#endif
" cmpwi %0,0 \n"
" bne 1f \n"
" addi %0,%0,1 \n"