diff options
| -rw-r--r-- | sim/ucsim/src/core/utils.src/stypes.h | 54 | ||||
| -rw-r--r-- | sim/ucsim/src/sims/tlcs.src/glob.cc | 14 | ||||
| -rw-r--r-- | sim/ucsim/src/sims/tlcs.src/glob.h | 2 | ||||
| -rw-r--r-- | sim/ucsim/src/sims/tlcs.src/objs.mk | 3 | ||||
| -rw-r--r-- | sim/ucsim/src/sims/tlcs.src/simtlcs.cc | 41 | ||||
| -rw-r--r-- | sim/ucsim/src/sims/tlcs.src/t870c.cc | 103 | ||||
| -rw-r--r-- | sim/ucsim/src/sims/tlcs.src/t870c1.cc | 54 | ||||
| -rw-r--r-- | sim/ucsim/src/sims/tlcs.src/t870c1cl.h | 45 | ||||
| -rw-r--r-- | sim/ucsim/src/sims/tlcs.src/t870ccl.h | 112 |
9 files changed, 396 insertions, 32 deletions
diff --git a/sim/ucsim/src/core/utils.src/stypes.h b/sim/ucsim/src/core/utils.src/stypes.h index b0841c7e7..e6a15ee1b 100644 --- a/sim/ucsim/src/core/utils.src/stypes.h +++ b/sim/ucsim/src/core/utils.src/stypes.h @@ -161,9 +161,27 @@ enum cpu_type { CPU_Z80N|CPU_GB80| CPU_R800), CPU_ALL_RXK = (CPU_R3K|CPU_R4K|CPU_R5K|CPU_R6K|CPU_R3KA|CPU_R2K), + + CPU_TLCS90 = 0x0001, + CPU_TLCS870 = 0x0002, + CPU_TLCS870C = 0x0004, + CPU_TLCS870C1 = 0x0008, + CPU_TLCS870X = 0x0010, + CPU_TLCS900 = 0x0020, + CPU_ALL_TLCS = (CPU_TLCS90| + CPU_TLCS870|CPU_TLCS870C,CPU_TLCS870C1|CPU_TLCS870X| + CPU_TLCS900), CPU_XA = 0x0001, CPU_ALL_XA = (CPU_XA), + + CPU_HC08 = 0x0001, + CPU_HCS08 = 0x0002, + CPU_ALL_HC08 = (CPU_HC08|CPU_HCS08), + + CPU_HC11 = 0x0004, + CPU_HC12 = 0x0008, + CPU_ALL_HC12 = (CPU_HC11|CPU_HC12), CPU_PBLAZE_3 = 0x0001, CPU_PBLAZE_6 = 0x0002, @@ -236,14 +254,6 @@ enum cpu_type { CPU_ST7 = 0x0001, CPU_ALL_ST7 = (CPU_ST7), - // Motorola - CPU_M6800 = 0x0001, - CPU_HC08 = 0x0002, - CPU_HCS08 = 0x0004, - CPU_M6809 = 0x0008, - CPU_HC11 = 0x0010, - CPU_HC12 = 0x0020, - // MOS6502 and variants CPU_6502 = 0x0001, // NMOS CPU_6502C = 0x0002, // 6502 + HALT pin @@ -277,25 +287,18 @@ enum cpu_type { // MCS48 Intel 8048 family CPU_I8021 = 0x0001, // 1k-? "1" CPU_I8022 = 0x0002, // 2k-? "2" - CPU_MCS21 = (CPU_I8021), - CPU_MCS22 = (CPU_I8022), + CPU_MCS21 = (CPU_I8021|CPU_I8022), CPU_I8035 = 0x0010, // 0k-64 "8" CPU_I8039 = 0x0020, // 0k-128 "8" CPU_I8040 = 0x0040, // 0k-256 "8" CPU_MCS30 = (CPU_I8035|CPU_I8039|CPU_I8040), CPU_I8041 = 0x0100, // "4" - CPU_I8041A = 0x0200, // "4" - CPU_I8041AH = 0x0400, // "4" - CPU_I8042 = 0x0800, // "4" - CPU_I8042AH = 0x1000, // "4" - CPU_I80C42 = 0x2000, // "4" - CPU_I80L42 = 0x4000, // "4" - CPU_MCS41 = (CPU_I8041|CPU_I8041A|CPU_I8041AH| - CPU_I8042|CPU_I8042AH|CPU_I80C42|CPU_I80L42), - CPU_I8048 = 0x8000, // 1k-64 "8" - CPU_I8049 = 0x10000,// 2k-128 "8" - CPU_I8050 = 0x20000,// 4k-256 "8" - CPU_MCS48 = ( CPU_MCS30 |CPU_I8048|CPU_I8049|CPU_I8050), + CPU_I8041A = 0x0200, // "A" + CPU_MCS41 = (CPU_I8041|CPU_I8041A), + CPU_I8048 = 0x1000, // 1k-64 "8" + CPU_I8049 = 0x2000, // 2k-128 "8" + CPU_I8050 = 0x4000, // 4k-256 "8" + CPU_MCS48 = (CPU_I8048|CPU_I8049|CPU_I8050), // OISC CPU_OISC = 0x0001, @@ -318,13 +321,6 @@ struct cpu_entry const char *sub_help; }; -struct cpu_collection -{ - const char *family; - const char *exe; - struct cpu_entry *entries; -}; - /* Classes of memories, this is index on the list */ enum mem_class { diff --git a/sim/ucsim/src/sims/tlcs.src/glob.cc b/sim/ucsim/src/sims/tlcs.src/glob.cc index fd4d83a2c..9bdc80153 100644 --- a/sim/ucsim/src/sims/tlcs.src/glob.cc +++ b/sim/ucsim/src/sims/tlcs.src/glob.cc @@ -498,4 +498,18 @@ struct dis_entry disass_tlcs[]= { // case 'X': /* mn in 4,5 byte */ snprintf(l,19,"0x%04x",(int)((c>>24)&0xffff)); s+= l; break; // case 'x': /* mn in 5,6 byte */ snprintf(l,19,"0x%04x",(int)((c>>32)&0xffff)); s+= l; break; + +struct cpu_entry cpus_tlcs[]= + { + { "TLCS90" , CPU_TLCS90, 0, "TLCS-90", "" }, + { "90" , CPU_TLCS90, 0, "TLCS-90", "" }, + + { "TLCS870C" , CPU_TLCS870C , 0, "TLCS-870C" , "" }, + { "C" , CPU_TLCS870C , 0, "TLCS-870C" , "" }, + { "TLCS870C1" , CPU_TLCS870C1, 0, "TLCS-870C1", "" }, + { "C1" , CPU_TLCS870C1, 0, "TLCS-870C1" , "" }, + + {NULL, CPU_NONE, 0, "", ""} + }; + /* End of tlcs.src/glob.cc */ diff --git a/sim/ucsim/src/sims/tlcs.src/glob.h b/sim/ucsim/src/sims/tlcs.src/glob.h index 1e0df97ae..d3e178451 100644 --- a/sim/ucsim/src/sims/tlcs.src/glob.h +++ b/sim/ucsim/src/sims/tlcs.src/glob.h @@ -32,6 +32,8 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA extern struct dis_entry disass_tlcs[]; +extern struct cpu_entry cpus_tlcs[]; + #endif /* End of tlcs.src/glob.h */ diff --git a/sim/ucsim/src/sims/tlcs.src/objs.mk b/sim/ucsim/src/sims/tlcs.src/objs.mk index 8df1d6b62..f5ff8c16a 100644 --- a/sim/ucsim/src/sims/tlcs.src/objs.mk +++ b/sim/ucsim/src/sims/tlcs.src/objs.mk @@ -4,4 +4,5 @@ OBJECTS = stlcs.o \ glob.o \ simtlcs.o tlcs.o \ inst_block.o inst_cpu_others.o inst_rot_sh.o \ - inst_jump.o inst_move.o inst_arith.o inst_bit.o + inst_jump.o inst_move.o inst_arith.o inst_bit.o \ + t870c.o t870c1.o diff --git a/sim/ucsim/src/sims/tlcs.src/simtlcs.cc b/sim/ucsim/src/sims/tlcs.src/simtlcs.cc index e109abdc1..19019a8a6 100644 --- a/sim/ucsim/src/sims/tlcs.src/simtlcs.cc +++ b/sim/ucsim/src/sims/tlcs.src/simtlcs.cc @@ -29,8 +29,12 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA //#include "appcl.h" // local -#include "simtlcscl.h" #include "tlcscl.h" +#include "t870ccl.h" +#include "t870c1cl.h" +#include "glob.h" + +#include "simtlcscl.h" cl_simtlcs::cl_simtlcs(class cl_app *the_app): @@ -40,7 +44,40 @@ cl_simtlcs::cl_simtlcs(class cl_app *the_app): class cl_uc * cl_simtlcs::mk_controller(void) { - return(new cl_tlcs(this)); + int i; + const char *typ= 0; + class cl_optref type_option(this); + class cl_uc *uc; + + type_option.init(); + type_option.use("cpu_type"); + i= 0; + if ((typ= type_option.get_value(typ)) == 0) + typ= "TLCS90"; + while ((cpus_tlcs[i].type_str != NULL) && + (strcasecmp(typ, cpus_tlcs[i].type_str) != 0)) + i++; + if (cpus_tlcs[i].type_str == NULL) + { + fprintf(stderr, "Unknown processor type. " + "Use -H option to see known types.\n"); + return(NULL); + } + switch (cpus_tlcs[i].type) + { + case CPU_TLCS90: + uc= new cl_tlcs(this); + return uc; + case CPU_TLCS870C: + uc= new cl_t870c(this); + return uc; + case CPU_TLCS870C1: + uc= new cl_t870c1(this); + return uc; + default: + return NULL; + } + return NULL; } diff --git a/sim/ucsim/src/sims/tlcs.src/t870c.cc b/sim/ucsim/src/sims/tlcs.src/t870c.cc new file mode 100644 index 000000000..5eaf9dbdd --- /dev/null +++ b/sim/ucsim/src/sims/tlcs.src/t870c.cc @@ -0,0 +1,103 @@ +/* + * Simulator of microcontrollers (t870c.cc) + * + * Copyright (C) 2016 Drotos Daniel + * + * To contact author send email to dr.dkdb@gmail.com + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include <stdlib.h> + +// local +#include "t870ccl.h" + + +cl_t870c::cl_t870c(class cl_sim *asim): + cl_uc(asim) +{ + regs8[0]= &cA; + regs8[1]= &cW; + regs8[2]= &cC; + regs8[3]= &cB; + regs8[4]= &cE; + regs8[5]= &cD; + regs8[6]= &cL; + regs8[7]= &cH; + regs16[0]= &cWA; + regs16[1]= &cBC; + regs16[2]= &cDE; + regs16[3]= &cHL; + regs16[4]= &cIX; + regs16[5]= &cIY; + regs16[6]= &cSP; + regs16[7]= &cHL; +} + +int +cl_t870c::init(void) +{ + cl_uc::init(); + mk_rbanks(); + rF&= ~MRBS; + + reg_cell_var(&cW, &rW, "W", "W register"); + reg_cell_var(&cA, &rA, "A", "A register"); + reg_cell_var(&cB, &rB, "B", "B register"); + reg_cell_var(&cC, &rC, "C", "C register"); + reg_cell_var(&cD, &rD, "D", "D register"); + reg_cell_var(&cE, &rE, "E", "E register"); + reg_cell_var(&cH, &rH, "H", "H register"); + reg_cell_var(&cL, &rL, "L", "L register"); + reg_cell_var(&cF, &rF, "PSW", "PSW register"); + + reg_cell_var(&cWA, &rWA, "WA", "WA register"); + reg_cell_var(&cBC, &rBC, "BC", "BC register"); + reg_cell_var(&cDE, &rDE, "DE", "DE register"); + reg_cell_var(&cHL, &rHL, "HL", "HL register"); + reg_cell_var(&cIX, &rIX, "IX", "IX register"); + reg_cell_var(&cIY, &rIY, "IY", "IY register"); + reg_cell_var(&cSP, &rSP, "SP", "SP register"); + return 0; +} + +void +cl_t870c::mk_rbanks(void) +{ + rbanks= (struct rbank_870c_t *)malloc(sizeof(*rbanks)); + rbank= &rbanks[0]; +} + +void +cl_t870c::decode_regs(void) +{ + cW.decode(&rW); + cA.decode(&rA); + cB.decode(&rB); + cC.decode(&rC); + cD.decode(&rD); + cE.decode(&rE); + cH.decode(&rH); + cL.decode(&rL); +} + + +/* End of tlcs.src/t870c.cc */ diff --git a/sim/ucsim/src/sims/tlcs.src/t870c1.cc b/sim/ucsim/src/sims/tlcs.src/t870c1.cc new file mode 100644 index 000000000..06ca2ea64 --- /dev/null +++ b/sim/ucsim/src/sims/tlcs.src/t870c1.cc @@ -0,0 +1,54 @@ +/* + * Simulator of microcontrollers (t870c1.cc) + * + * Copyright (C) 2016 Drotos Daniel + * + * To contact author send email to dr.dkdb@gmail.com + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include <stdlib.h> + +// local +#include "t870c1cl.h" + + +cl_t870c1::cl_t870c1(class cl_sim *asim): + cl_t870c(asim) +{ +} + + +int +cl_t870c1::init(void) +{ + cl_t870c::init(); + return 0; +} + +void +cl_t870c1::mk_rbanks(void) +{ + rbanks= (struct rbank_870c_t *)malloc(sizeof(*rbanks)); + rbank= &rbanks[0]; +} + +/* End of tlcs.src/t870c1.cc */ diff --git a/sim/ucsim/src/sims/tlcs.src/t870c1cl.h b/sim/ucsim/src/sims/tlcs.src/t870c1cl.h new file mode 100644 index 000000000..4231def1a --- /dev/null +++ b/sim/ucsim/src/sims/tlcs.src/t870c1cl.h @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (t870c1cl.h) + * + * Copyright (C) 2016 Drotos Daniel + * + * To contact author send email to dr.dkdb@gmail.com + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef T870C1CL_HEADER +#define T870C1CL_HEADER + +#include "t870ccl.h" + + +class cl_t870c1: public cl_t870c +{ + public: + cl_t870c1(class cl_sim *asim); + virtual void mk_rbanks(); + virtual int init(void); +}; + + +#endif + +/* End of tlcs.src/tl870cl.h */ diff --git a/sim/ucsim/src/sims/tlcs.src/t870ccl.h b/sim/ucsim/src/sims/tlcs.src/t870ccl.h new file mode 100644 index 000000000..c83c30263 --- /dev/null +++ b/sim/ucsim/src/sims/tlcs.src/t870ccl.h @@ -0,0 +1,112 @@ +/* + * Simulator of microcontrollers (t870ccl.h) + * + * Copyright (C) 2016 Drotos Daniel + * + * To contact author send email to dr.dkdb@gmail.com + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef T870CCL_HEADER +#define T870CCL_HEADER + +#include "uccl.h" + + +#ifdef WORDS_BIGENDIAN +# define PAIR(h,l) u8_t h, l +#else +# define PAIR(h,l) u8_t l, h +#endif + +struct rbank_870c_t +{ + union { u16_t wa; struct { PAIR(w,a); } rwa; }; + union { u16_t bc; struct { PAIR(b,c); } rbc; }; + union { u16_t de; struct { PAIR(d,e); } rde; }; + union { u16_t hl; struct { PAIR(h,l); } rhl; }; + u16_t ix, iy; +}; + + +#define rW (rbank->rwa.w) +#define rA (rbank->rwa.a) +#define rB (rbank->rbc.b) +#define rC (rbank->rbc.c) +#define rD (rbank->rde.d) +#define rE (rbank->rde.e) +#define rH (rbank->rhl.h) +#define rL (rbank->rhl.l) +#define rF (rPSW) + +#define rWA (rbank->wa) +#define rBC (rbank->bc) +#define rDE (rbank->de) +#define rHL (rbank->hl) +#define rIX (rbank->ix) +#define rIY (rbank->iy) + +#define cF (cPSW) + + +enum flag_mask_t { + MJF= (0x80), + MZF= (0x40), + MCF= (0x20), + MHF= (0x10), + MSF= (0x08), + MVF= (0x04), + MRBS= (0x02) +}; + + +class cl_t870c: public cl_uc +{ +protected: + struct rbank_870c_t *rbanks, *rbank; +public: + u16_t rSP; + u8_t rPSW; + class cl_cell8 cW, cA; + class cl_cell8 cB, cC; + class cl_cell8 cD, cE; + class cl_cell8 cH, cL; + class cl_cell8 *regs8[8]; + class cl_cell16 cWA; + class cl_cell16 cBC; + class cl_cell16 cDE; + class cl_cell16 cHL; + class cl_cell16 cIX; + class cl_cell16 cIY; + class cl_cell16 cSP; + class cl_cell16 *regs16[8]; + class cl_cell8 cPSW; +public: + cl_t870c(class cl_sim *asim); + virtual int init(void); + virtual void mk_rbanks(); + virtual void decode_regs(void); +}; + + +#endif + +/* End of tlcs.src/tl870ccl.h */ |