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-rw-r--r--src/SDCCopt.c22
-rw-r--r--src/SDCCsymt.c5
-rw-r--r--src/SDCCval.c11
-rw-r--r--src/ds390/gen.c2
-rw-r--r--src/ds390/ralloc.c2
-rw-r--r--src/f8/gen.c2
-rw-r--r--src/f8/gen.h2
-rw-r--r--src/hc08/gen.c2
-rw-r--r--src/mcs51/gen.c2
-rw-r--r--src/mos6502/gen.c2
-rw-r--r--src/pdk/gen.c14
-rw-r--r--src/pic14/gen.c8
-rw-r--r--src/pic14/ralloc.c2
-rw-r--r--src/pic16/ralloc.c2
-rw-r--r--src/stm8/gen.c10
-rw-r--r--src/stm8/peep.c2
-rw-r--r--src/z80/gen.c32
-rw-r--r--src/z80/gen.h2
-rw-r--r--src/z80/peep.c4
19 files changed, 86 insertions, 42 deletions
diff --git a/src/SDCCopt.c b/src/SDCCopt.c
index f82cabf85..4595bbef0 100644
--- a/src/SDCCopt.c
+++ b/src/SDCCopt.c
@@ -563,13 +563,29 @@ cnvFromFloatCast (iCode * ic, eBBlock * ebp)
{
iCode *ip, *newic;
symbol *func = NULL;
- sym_link *type = copyLinkChain (operandType (IC_LEFT (ic)));
- SPEC_SHORT (type) = 0;
char *filename = ic->filename;
int lineno = ic->lineno;
int bwd, su;
int bytesPushed=0;
+ // Use basic type cast function for _BitInt. Choose something big enough to represent all values of the _BitInt, don't worry about what happens if that is not enough for the float value, or some of the basic type values won't fit into the BitInt - all that is UB anyway.
+ if (IS_BITINT (operandType (ic->left)))
+ {
+ sym_link *newtype;
+ if (SPEC_BITINTWIDTH (operandType (ic->left)) <= 16)
+ newtype = newIntLink();
+ else if (SPEC_BITINTWIDTH (operandType (ic->left)) <= 32)
+ newtype = newLongLink();
+ else // Fall back to 64 bit.
+ newtype = newLongLongLink();
+ SPEC_USIGN (newtype) = SPEC_USIGN (operandType (ic->left));
+ ic->left = operandFromLink (newtype);
+ appendCast (ic, newtype, ebp);
+ }
+
+ sym_link *type = copyLinkChain (operandType (ic->left));
+ SPEC_SHORT (type) = 0;
+
ip = ic->next;
/* remove it from the iCode */
unsetDefsAndUses (ic);
@@ -2886,7 +2902,7 @@ optimizeFinalCast (ebbIndex *ebbi)
// Some regression tests fail, including gcc-torture-execute-pr38236;
// looking into that one for -mmcs51 --model-small , register allocation
// puts the result of a 16-bit read from e generic pointer into dptr,
- // which codegen can't handle (it genrated code where dpl is overwritten by
+ // which codegen can't handle (it generated code where dpl is overwritten by
// the lower byte of the result, then used as pointer once more).
// This also triggers a pic16 bug resulting in invalid asm code being generated.
if (TARGET_MCS51_LIKE || TARGET_IS_PIC16)
diff --git a/src/SDCCsymt.c b/src/SDCCsymt.c
index 71543b73a..440a84d4c 100644
--- a/src/SDCCsymt.c
+++ b/src/SDCCsymt.c
@@ -641,6 +641,8 @@ checkTypeSanity (sym_link *etype, const char *name)
if ((SPEC_NOUN (etype) == V_BITINT ||
SPEC_NOUN (etype) == V_BOOL ||
+ SPEC_NOUN (etype) == V_BIT ||
+ SPEC_NOUN (etype) == V_SBIT ||
SPEC_NOUN (etype) == V_CHAR ||
SPEC_NOUN (etype) == V_FLOAT ||
SPEC_NOUN (etype) == V_FIXED16X16 ||
@@ -653,7 +655,8 @@ checkTypeSanity (sym_link *etype, const char *name)
if ((SPEC_NOUN (etype) == V_BOOL ||
SPEC_NOUN (etype) == V_FLOAT ||
SPEC_NOUN (etype) == V_FIXED16X16 ||
- SPEC_NOUN (etype) == V_DOUBLE || SPEC_NOUN (etype) == V_VOID) && (etype->select.s.b_signed || SPEC_USIGN (etype)))
+ SPEC_NOUN (etype) == V_DOUBLE || SPEC_NOUN (etype) == V_VOID) && (etype->select.s.b_signed || SPEC_USIGN (etype)) ||
+ (SPEC_NOUN (etype) == V_BIT || SPEC_NOUN (etype) == V_SBIT) && etype->select.s.b_signed)
{ // signed or unsigned for float double or void
werror (E_SIGNED_OR_UNSIGNED_INVALID, noun, name);
}
diff --git a/src/SDCCval.c b/src/SDCCval.c
index f2210d308..76f1d31b0 100644
--- a/src/SDCCval.c
+++ b/src/SDCCval.c
@@ -763,6 +763,7 @@ checkConstantRange (sym_link *var, sym_link *lit, int op, bool exchangeLeftRight
#if 0
printf("checkConstantRange\n");
+ printf(" op = %d\n", op);
printf(" varBits = %d\n", varBits);
printf(" ulitVal = 0x%016lx\n", ulitVal);
printf(" signExtMask = 0x%016lx\n", signExtMask);
@@ -859,7 +860,7 @@ checkConstantRange (sym_link *var, sym_link *lit, int op, bool exchangeLeftRight
TYPE_TARGET_ULONGLONG minValP, maxValP, minValM, maxValM;
TYPE_TARGET_ULONGLONG opBitsMask = reBits >= sizeof(opBitsMask)*8 ? ~0ull : ((1ull << reBits)-1);
- if (IS_BOOL (var))
+ if (IS_BOOLEAN (var))
{
minValP = 0;
maxValP = 1;
@@ -974,7 +975,7 @@ checkConstantRange (sym_link *var, sym_link *lit, int op, bool exchangeLeftRight
/* signed operation */
TYPE_TARGET_LONGLONG minVal, maxVal;
- if (IS_BOOL (var))
+ if (IS_BOOLEAN (var))
{
minVal = 0;
maxVal = 1;
@@ -994,6 +995,12 @@ checkConstantRange (sym_link *var, sym_link *lit, int op, bool exchangeLeftRight
maxVal = ~(signExtMask | signMask);
}
+#if 0
+ printf(" litVal = %lld\n", litVal);
+ printf(" maxVal = %lld\n", maxVal);
+ printf(" minVal = %lld\n", minVal);
+#endif
+
switch (op)
{
case EQ_OP: /* var == lit */
diff --git a/src/ds390/gen.c b/src/ds390/gen.c
index 213788c2a..1368b7518 100644
--- a/src/ds390/gen.c
+++ b/src/ds390/gen.c
@@ -4273,7 +4273,7 @@ genEndFunction (iCode * ic)
return;
/* If there were stack parameters, we cannot optimize without also */
- /* fixing all of the stack offsets; this is too dificult to consider. */
+ /* fixing all of the stack offsets; this is too difficult to consider. */
if (FUNC_HASSTACKPARM (sym->type))
return;
diff --git a/src/ds390/ralloc.c b/src/ds390/ralloc.c
index 5d6d2b5c0..1938201d2 100644
--- a/src/ds390/ralloc.c
+++ b/src/ds390/ralloc.c
@@ -3280,7 +3280,7 @@ packRegisters (eBBlock ** ebpp, int blockno)
packRegsDPTRuse (IC_LEFT (ic));
}
- /* if this is a cast for intergral promotion then
+ /* if this is a cast for integral promotion then
check if it's the only use of the definition of the
operand being casted/ if yes then replace
the result of that arithmetic operation with
diff --git a/src/f8/gen.c b/src/f8/gen.c
index e1625b54e..69ee46011 100644
--- a/src/f8/gen.c
+++ b/src/f8/gen.c
@@ -7662,7 +7662,7 @@ f8IsReturned (const char *what)
}
// Check if what is part of the ith argument (counting from 1) to a function of type ftype.
-// If what is 0, just check if hte ith argument is in registers.
+// If what is 0, just check if the ith argument is in registers.
bool
f8IsRegArg (struct sym_link *ftype, int i, const char *what)
{
diff --git a/src/f8/gen.h b/src/f8/gen.h
index 8066f2738..9a772f9dd 100644
--- a/src/f8/gen.h
+++ b/src/f8/gen.h
@@ -86,7 +86,7 @@ void f8_emitDebuggerSymbol (const char *);
bool f8IsReturned(const char *what);
// Check if what is part of the ith argument (counting from 1) to a function of type ftype.
-// If what is 0, just check if hte ith argument is in registers.
+// If what is 0, just check if the ith argument is in registers.
bool f8IsRegArg(struct sym_link *ftype, int i, const char *what);
// Check if what is part of the any argument (counting from 1) to a function of type ftype.
diff --git a/src/hc08/gen.c b/src/hc08/gen.c
index 8d8e6dfa3..fdbe720bb 100644
--- a/src/hc08/gen.c
+++ b/src/hc08/gen.c
@@ -3919,7 +3919,7 @@ genSend (set *sendSet)
}
else
{
- /* otherwise perfer to load x last (lsb to msb order) */
+ /* otherwise prefer to load x last (lsb to msb order) */
loadRegFromAop (hc08_reg_a, AOP (IC_LEFT (send1)), 0);
loadRegFromAop (hc08_reg_x, AOP (IC_LEFT (send1)), 1);
}
diff --git a/src/mcs51/gen.c b/src/mcs51/gen.c
index 1b1ab3e31..d184bffe4 100644
--- a/src/mcs51/gen.c
+++ b/src/mcs51/gen.c
@@ -5057,7 +5057,7 @@ genEndFunction (iCode * ic)
return;
/* If there were stack parameters, we cannot optimize without also */
- /* fixing all of the stack offsets; this is too dificult to consider. */
+ /* fixing all of the stack offsets; this is too difficult to consider. */
if (FUNC_HASSTACKPARM (ftype))
return;
diff --git a/src/mos6502/gen.c b/src/mos6502/gen.c
index a3e2350ad..c26350e45 100644
--- a/src/mos6502/gen.c
+++ b/src/mos6502/gen.c
@@ -8584,7 +8584,7 @@ drym6502iCode (iCode *ic)
}
/**************************************************************************
- * genm6502Code - generate code for for a block of instructions
+ * genm6502Code - generate code for a block of instructions
*************************************************************************/
void
genm6502Code (iCode *lic)
diff --git a/src/pdk/gen.c b/src/pdk/gen.c
index cebf72c4e..e0934fe37 100644
--- a/src/pdk/gen.c
+++ b/src/pdk/gen.c
@@ -5327,6 +5327,8 @@ genCast (const iCode *ic)
// Cast to _BitInt can require mask of top byte.
if (IS_BITINT (resulttype) && (SPEC_BITINTWIDTH (resulttype) % 8) && bitsForType (resulttype) < bitsForType (righttype))
{
+ bool swapped_a = false;
+
aopOp (right, ic);
aopOp (result, ic);
@@ -5336,6 +5338,12 @@ genCast (const iCode *ic)
pushed_a = true;
}
genMove (result->aop, right->aop, true, regDead (P_IDX, ic));
+ if (result->aop->size == 2 && aopInReg (result->aop, 0, A_IDX))
+ {
+ emit2 ("xch", "a, p");
+ cost (1, 1);
+ swapped_a = true;
+ }
cheapMove (ASMOP_A, 0, result->aop, result->aop->size - 1, true, false, true);
emit2 ("and", "a, #0x%02x", topbytemask);
cost (2, 1);
@@ -5354,7 +5362,11 @@ genCast (const iCode *ic)
emitLabel (tlbl);
}
cheapMove (result->aop, result->aop->size - 1, ASMOP_A, 0, true, false, true);
-
+ if (swapped_a)
+ {
+ emit2 ("xch", "a, p");
+ cost (1, 1);
+ }
goto release;
}
diff --git a/src/pic14/gen.c b/src/pic14/gen.c
index 6b56bc594..33d245e2f 100644
--- a/src/pic14/gen.c
+++ b/src/pic14/gen.c
@@ -62,7 +62,7 @@ static void genEndCritical (iCode * ic);
(!IS_ITEMP (op) /* --> iTemps never reside in __code */ \
&& IS_SYMOP (op) /* --> must be an immediate (otherwise we would be in genConstPointerGet) */ \
&& !IS_FUNC (OP_SYM_TYPE (op)) /* --> we would want its address instead of the first instruction */ \
- && !IS_CODEPTR (OP_SYM_TYPE (op)) /* --> get symbols address instread */ \
+ && !IS_CODEPTR (OP_SYM_TYPE (op)) /* --> get symbols address instead */ \
&& IN_CODESPACE (SPEC_OCLS (getSpec (OP_SYM_TYPE (op)))))
/*
@@ -210,7 +210,7 @@ emitpLabel (int key)
/* gen.h defines a macro emitpcode that should be used to call emitpcode
* as this allows for easy debugging (ever asked the question: where was
- * this instruction geenrated? Here is the answer... */
+ * this instruction generated? Here is the answer... */
void
emitpcode_real (PIC_OPCODE poc, pCodeOp * pcop)
{
@@ -1942,7 +1942,7 @@ assignResultValue (iCode *ic)
/*-----------------------------------------------------------------*/
-/* genIpush - genrate code for pushing this gets a little complex */
+/* genIpush - generate code for pushing this gets a little complex */
/*-----------------------------------------------------------------*/
static void
genIpush (iCode * ic)
@@ -2037,7 +2037,7 @@ genIpop (iCode * ic)
}
/*-----------------------------------------------------------------*/
-/* unsaverbank - restores the resgister bank from stack */
+/* unsaverbank - restores the register bank from stack */
/*-----------------------------------------------------------------*/
static void
unsaverbank (int bank, iCode * ic, bool popPsw)
diff --git a/src/pic14/ralloc.c b/src/pic14/ralloc.c
index be825c46f..cead5f051 100644
--- a/src/pic14/ralloc.c
+++ b/src/pic14/ralloc.c
@@ -3668,7 +3668,7 @@ packRegisters (eBBlock * ebp)
packRegsForOneuse (ic, IC_LEFT (ic), ebp);
- /* if this is cast for intergral promotion then
+ /* if this is cast for integral promotion then
check if only use of the definition of the
operand being casted/ if yes then replace
the result of that arithmetic operation with
diff --git a/src/pic16/ralloc.c b/src/pic16/ralloc.c
index d3b86ede2..09c320ddb 100644
--- a/src/pic16/ralloc.c
+++ b/src/pic16/ralloc.c
@@ -4241,7 +4241,7 @@ pic16_packRegisters (eBBlock * ebp)
#endif
#ifndef NO_cast_peep
- /* if this is cast for intergral promotion then
+ /* if this is cast for integral promotion then
check if only use of the definition of the
operand being casted/ if yes then replace
the result of that arithmetic operation with
diff --git a/src/stm8/gen.c b/src/stm8/gen.c
index 67fe8d429..19d1adab0 100644
--- a/src/stm8/gen.c
+++ b/src/stm8/gen.c
@@ -1786,12 +1786,12 @@ genCopyStack (asmop *result, int roffset, asmop *source, int soffset, int n, boo
{
wassert_bt (*size >= 2);
- // Using ldw results in substancially shorter, but somewhat slower code.
+ // Using ldw results in substantially shorter, but somewhat slower code.
if (!x_free && !y_free && really_do_it_now && (optimize.codeSize || !a_free && !optimize.codeSpeed))
{
push (ASMOP_X, 0, 2);
- pushed_x = TRUE;
- x_free = TRUE;
+ pushed_x = true;
+ x_free = true;
}
if (y_free) // Unlike with other operations, loading between y and stk is as efficient as for x, so we try y first here.
@@ -7659,7 +7659,7 @@ genLeftShift (const iCode *ic)
else
shiftop = result->aop;
- iterations = (right->aop->type == AOP_LIT ? byteOfVal (right->aop->aopu.aop_lit, 0) : 2); // Use 2 as a guess for estimating hte cycle count.
+ iterations = (right->aop->type == AOP_LIT ? byteOfVal (right->aop->aopu.aop_lit, 0) : 2); // Use 2 as a guess for estimating the cycle count.
// Avoid overwriting shift count on stack when moving to shiftop.
if (aopOnStack (right->aop, 0, 1) && aopRS (shiftop))
@@ -10086,7 +10086,7 @@ stm8IsReturned(const char *what)
}
// Check if what is part of the ith argument (counting from 1) to a function of type ftype.
-// If what is 0, just check if hte ith argument is in registers.
+// If what is 0, just check if the ith argument is in registers.
bool
stm8IsRegArg (struct sym_link *ftype, int i, const char *what)
{
diff --git a/src/stm8/peep.c b/src/stm8/peep.c
index 0bc8debcf..9e69e907f 100644
--- a/src/stm8/peep.c
+++ b/src/stm8/peep.c
@@ -366,7 +366,7 @@ stm8instructionSize(lineNode *pl)
int i = 0;
wassert (op1start);
- if(!strcmp(op1start, "a") || !strcmp(op1start, "(x)"))
+ if(!STRCASECMP(op1start, "a") || !STRCASECMP(op1start, "(x)"))
return(1);
if(!strcmp(op1start, "(y)"))
return(2);
diff --git a/src/z80/gen.c b/src/z80/gen.c
index 10d69dfca..392b44427 100644
--- a/src/z80/gen.c
+++ b/src/z80/gen.c
@@ -5911,7 +5911,7 @@ _saveRegsForCall (const iCode *ic, bool saveHLifused, bool dontsaveIY)
}
/*-----------------------------------------------------------------*/
-/* genIpush - genrate code for pushing this gets a little complex */
+/* genIpush - generate code for pushing this gets a little complex */
/*-----------------------------------------------------------------*/
static void
genIpush (const iCode *ic)
@@ -7938,7 +7938,8 @@ setupToPreserveCarry (asmop *result, asmop *left, asmop *right)
}
else if (couldDestroyCarry (result))
{
- shiftIntoPair (PAIR_HL, result);
+ if (!requiresHL (left))
+ shiftIntoPair (PAIR_HL, result);
}
}
}
@@ -8331,7 +8332,7 @@ genPlus (iCode * ic)
if (couldDestroyCarry (IC_RESULT (ic)->aop) &&
(IC_RESULT (ic)->aop == leftop || IC_RESULT (ic)->aop == rightop))
shiftIntoPair (PAIR_HL, IC_RESULT (ic)->aop);
- else if (couldDestroyCarry (rightop))
+ else if (couldDestroyCarry (rightop) && !requiresHL (leftop))
shiftIntoPair (PAIR_HL, rightop);
}
@@ -8479,12 +8480,13 @@ genPlus (iCode * ic)
i += 2;
}
else if (!maskedword && (!premoved || i) && !started && i == size - 2 && aopInReg (ic->result->aop, i, HL_IDX) &&
- aopInReg (rightop, i, C_IDX) && isRegDead (B_IDX, ic))
+ aopInReg (rightop, i, C_IDX) && isRegDead (B_IDX, ic) && leftop->regs[B_IDX] <= i + 1 &&
+ !((aopInReg (rightop, i + 1, H_IDX) || aopInReg (rightop, i + 1, L_IDX)) && leftop->regs[B_IDX] >= i))
{
if (aopInReg (rightop, i + 1, H_IDX) || aopInReg (rightop, i + 1, L_IDX))
{
- cheapMove (ASMOP_B, 0, ic->right->aop, i + 1, true);
- genMove_o (ASMOP_HL, 0, ic->left->aop, i, 2, false, true, de_dead, false, !started);
+ cheapMove (ASMOP_B, 0, rightop, i + 1, true);
+ genMove_o (ASMOP_HL, 0, leftop, i, 2, false, true, de_dead, false, !started);
}
else
{
@@ -8497,12 +8499,13 @@ genPlus (iCode * ic)
i += 2;
}
else if (!maskedword && (!premoved || i) && !started && i == size - 2 && aopInReg (IC_RESULT (ic)->aop, i, HL_IDX) &&
- aopInReg (rightop, i, E_IDX) && isRegDead (D_IDX, ic))
+ aopInReg (rightop, i, E_IDX) && isRegDead (D_IDX, ic) && leftop->regs[D_IDX] <= i + 1 &&
+ !((aopInReg (rightop, i + 1, H_IDX) || aopInReg (rightop, i + 1, L_IDX)) && leftop->regs[D_IDX] >= i))
{
if (aopInReg (rightop, i + 1, H_IDX) || aopInReg (rightop, i + 1, L_IDX))
{
- cheapMove (ASMOP_D, 0, IC_RIGHT (ic)->aop, i + 1, true);
- genMove_o (ASMOP_HL, 0, ic->left->aop, i, 2, false, true, de_dead, false, true);
+ cheapMove (ASMOP_D, 0, rightop, i + 1, true);
+ genMove_o (ASMOP_HL, 0, leftop, i, 2, false, true, de_dead, false, true);
}
else
{
@@ -8515,17 +8518,18 @@ genPlus (iCode * ic)
i += 2;
}
else if (!maskedword && (!premoved || i) && !started && i == size - 2 && aopInReg (IC_RESULT (ic)->aop, i, HL_IDX) &&
- aopInReg (leftop, i, E_IDX) && isRegDead (D_IDX, ic))
+ aopInReg (leftop, i, E_IDX) && isRegDead (D_IDX, ic) && rightop->regs[D_IDX] <= i + 1 &&
+ !((aopInReg (leftop, i + 1, H_IDX) || aopInReg (leftop, i + 1, L_IDX)) && rightop->regs[D_IDX] >= i))
{
if (aopInReg (leftop, i + 1, H_IDX) || aopInReg (leftop, i + 1, L_IDX))
{
- cheapMove (ASMOP_D, 0, IC_LEFT (ic)->aop, i + 1, true);
- fetchPairLong (PAIR_HL, IC_RIGHT (ic)->aop, 0, i);
+ cheapMove (ASMOP_D, 0, leftop, i + 1, true);
+ fetchPairLong (PAIR_HL, rightop, 0, i);
}
else
{
- fetchPairLong (PAIR_HL, IC_RIGHT (ic)->aop, 0, i);
- cheapMove (ASMOP_D, 0, IC_LEFT (ic)->aop, i + 1, true);
+ fetchPairLong (PAIR_HL, rightop, 0, i);
+ cheapMove (ASMOP_D, 0, leftop, i + 1, true);
}
emit3w (A_ADD, ASMOP_HL, ASMOP_DE);
started = true;
diff --git a/src/z80/gen.h b/src/z80/gen.h
index ea22520e2..67734b39d 100644
--- a/src/z80/gen.h
+++ b/src/z80/gen.h
@@ -87,7 +87,7 @@ void z80_emitDebuggerSymbol (const char *);
bool z80IsReturned(const char *what);
// Check if what is part of the ith argument (counting from 1) to a function of type ftype.
-// If what is 0, just check if hte ith argument is in registers.
+// If what is 0, just check if the ith argument is in registers.
bool z80IsRegArg(struct sym_link *ftype, int i, const char *what);
// Check if what is part of the any argument (counting from 1) to a function of type ftype.
diff --git a/src/z80/peep.c b/src/z80/peep.c
index 611a9faf7..ce284fd40 100644
--- a/src/z80/peep.c
+++ b/src/z80/peep.c
@@ -1575,8 +1575,10 @@ int z80instructionSize(lineNode *pl)
}
/* 16 bit add / subtract / and / or */
- if(IS_Z80N && ISINST(pl->line, "add") && (!STRNCASECMP(op1start, "bc", 2) || !STRNCASECMP(op1start, "de", 2) || !STRNCASECMP(op1start, "hl", 2)))
+ if(IS_Z80N && ISINST(pl->line, "add") && (!STRNCASECMP(op1start, "bc", 2) || !STRNCASECMP(op1start, "de", 2) || !STRNCASECMP(op1start, "hl", 2)) && op2start[0] == '#')
return(4);
+ else if(IS_Z80N && ISINST(pl->line, "add") && (!STRNCASECMP(op1start, "bc", 2) || !STRNCASECMP(op1start, "de", 2) || !STRNCASECMP(op1start, "hl", 2)) && !STRNCASECMP(op1start, "a", 1))
+ return(2);
if((ISINST(pl->line, "add") || ISINST(pl->line, "adc") || ISINST(pl->line, "sbc") || IS_RAB && (ISINST(pl->line, "and") || ISINST(pl->line, "or"))) &&
!STRNCASECMP(op1start, "hl", 2))
{
generated by cgit v1.2.3 (git 2.46.0) at 2025-08-11 13:42:05 +0000