summaryrefslogtreecommitdiff
path: root/support/regression/tests/interrupt.c.in
blob: 176d917206fb973e16762675970dee8c4d69b77e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
/** Interrupt tests.
    regbank: 0,1
 */
#include <testfwk.h>

#if defined(__SDCC_mcs51)

#include <8052.h>

volatile long lA = 12345;
volatile long lB = 67890;
volatile long lC = 0;

#endif

void
testInterrupt (void)
{
#if defined(__SDCC_mcs51)
  register long x = lC;

  //enable the interrupt and set it
  ET2 = 1;
  EA = 1;
  TF2 = 1;

  while (TF2)
    ; //wait until serviced
  ASSERT (lC + x == 74474);
#else
  ASSERT (1);
#endif
}

#if defined(__SDCC_mcs51)
// Timer2 interrupt service routine
// with register and (stack)spil usage
void
T2_isr (void) __interrupt (5) __using({regbank})
{
    long a, b, c;
    a = lA + 0xBABE;
    b = lB + 0xBEEB;
    c = a ^ b;
    lC = c;
    TF2 = 0;
}
#endif