Merge kroah.com:/home/greg/linux/BK/bleed-2.5

into kroah.com:/home/greg/linux/BK/pci-2.5

10 files changed, 12 insertions, 12 deletions

diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 446f28d33c7f..cf6fb793e8e0 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -44,7 +44,7 @@ static void ack_none(unsigned int irq)
 {
 	/*
 	 * 'what should we do if we get a hw irq event on an illegal vector'.
-	 * each architecture has to answer this themselves, it doesnt deserve
+	 * each architecture has to answer this themselves, it doesn't deserve
 	 * a generic callback i think.
 	 */
 	printk("unexpected interrupt %d\n", irq);
diff --git a/arch/mips/kernel/pci.c b/arch/mips/kernel/pci.c
index e13151386427..81aea7026fa2 100644
--- a/arch/mips/kernel/pci.c
+++ b/arch/mips/kernel/pci.c
@@ -19,7 +19,7 @@
  * Strategies:
  *
  * . We rely on pci_auto.c file to assign PCI resources (MEM and IO)
- *   TODO: this shold be optional for some machines where they do have
+ *   TODO: this should be optional for some machines where they do have
  *   a real "pcibios" that does resource assignment.
  *
  * . We then use pci_scan_bus() to "discover" all the resources for
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index a775854fd64c..2511f9d4f630 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -112,7 +112,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
 	p->thread.reg31 = (unsigned long) ret_from_fork;
 
 	/*
-	 * New tasks loose permission to use the fpu. This accelerates context
+	 * New tasks lose permission to use the fpu. This accelerates context
 	 * switching for most programs since they don't use the fpu.
 	 */
 	p->thread.cp0_status = read_32bit_cp0_register(CP0_STATUS) &
diff --git a/arch/mips/kernel/r2300_misc.S b/arch/mips/kernel/r2300_misc.S
index 30031e295b8d..8ef3683f983d 100644
--- a/arch/mips/kernel/r2300_misc.S
+++ b/arch/mips/kernel/r2300_misc.S
@@ -76,7 +76,7 @@
 	/* Check is PTE is present, if not then jump to LABEL.
 	 * PTR points to the page table where this PTE is located,
 	 * when the macro is done executing PTE will be restored
-	 * with it's original value.
+	 * with its original value.
 	 */
 #define PTE_PRESENT(pte, ptr, label) \
 	andi	pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 973dbb271da7..aefdff8645e7 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -80,7 +80,7 @@ LEAF(lazy_fpu_switch)
 	beqz	a0, 2f				# Save floating point state
 	 nor	t3, zero, t3
 	.set	reorder
-	lw	t1, ST_OFF(a0)			# last thread looses fpu
+	lw	t1, ST_OFF(a0)			# last thread loses fpu
 	and	t1, t3
 	sw	t1, ST_OFF(a0)
 	FPU_SAVE_SINGLE(a0, t1)			# clobbers t1
@@ -108,7 +108,7 @@ LEAF(restore_fp)
 
 /*
  * Load the FPU with signalling NANS.  This bit pattern we're using has
- * the property that no matter wether considered as single or as double
+ * the property that no matter whether considered as single or as double
  * precission represents signaling NANS.
  *
  * We initialize fcr31 to rounding to nearest, no exceptions.
diff --git a/arch/mips/kernel/r4k_misc.S b/arch/mips/kernel/r4k_misc.S
index e16820f889c0..510b08ca9d16 100644
--- a/arch/mips/kernel/r4k_misc.S
+++ b/arch/mips/kernel/r4k_misc.S
@@ -93,7 +93,7 @@
 	/* Check is PTE is present, if not then jump to LABEL.
 	 * PTR points to the page table where this PTE is located,
 	 * when the macro is done executing PTE will be restored
-	 * with it's original value.
+	 * with its original value.
 	 */
 #define PTE_PRESENT(pte, ptr, label) \
 	andi	pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index c455538a9ebe..18d5ae71abe3 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -85,7 +85,7 @@ LEAF(lazy_fpu_switch)
 	beqz	a0, 2f				# Save floating point state
 	 nor	t3, zero, t3
 
-	lw	t1, ST_OFF(a0)			# last thread looses fpu
+	lw	t1, ST_OFF(a0)			# last thread loses fpu
 	and	t1, t3
 	sw	t1, ST_OFF(a0)
 
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 30634e314992..26a70f6d1a13 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -775,7 +775,7 @@ void __init setup_arch(char **cmdline_p)
 		request_resource(&iomem_resource, res);
 
 		/*
-		 *  We dont't know which RAM region contains kernel data,
+		 *  We don't know which RAM region contains kernel data,
 		 *  so we try it repeatedly and let the resource manager
 		 *  test it.
 		 */
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 6adf09fdf6ad..f7551d197dfb 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -32,7 +32,7 @@
 #define USECS_PER_JIFFY (1000000/HZ)
 #define USECS_PER_JIFFY_FRAC ((1000000ULL << 32) / HZ & 0xffffffff)
 
-u64 jiffies_64;
+u64 jiffies_64 = INITIAL_JIFFIES;
 
 /*
  * forward reference
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 5a25242b368d..ea3d490934f0 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -793,7 +793,7 @@ void __init trap_init(void)
 	/* Some firmware leaves the BEV flag set, clear it.  */
 	clear_cp0_status(ST0_BEV);
 
-	/* Copy the generic exception handler code to it's final destination. */
+	/* Copy the generic exception handler code to its final destination. */
 	memcpy((void *)(KSEG0 + 0x80), &except_vec1_generic, 0x80);
 	memcpy((void *)(KSEG0 + 0x100), &except_vec2_generic, 0x80);
 	memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
@@ -805,7 +805,7 @@ void __init trap_init(void)
 		set_except_vector(i, handle_reserved);
 
 	/* 
-	 * Copy the EJTAG debug exception vector handler code to it's final 
+	 * Copy the EJTAG debug exception vector handler code to its final 
 	 * destination.
 	 */
 	memcpy((void *)(KSEG0 + 0x300), &except_vec_ejtag_debug, 0x80);