Merge davem@nuts.davemloft.net:/disk1/BK/net-2.6

into kernel.bkbits.net:/home/davem/net-2.6

77 files changed, 5321 insertions, 565 deletions

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 8efb8e02aaf7..ce61d06cae26 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -45,6 +45,12 @@ config SH_7751_SOLUTION_ENGINE
 	  Select 7751 SolutionEngine if configuring for a Hitachi SH7751
 	  evalutation board.
 
+config SH_7300_SOLUTION_ENGINE
+	bool "SolutionEngine7300"
+	help
+	  Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V)
+	  evalutation board.
+
 config SH_7751_SYSTEMH
 	bool "SystemH7751R"
 	help
@@ -138,6 +144,18 @@ config SH_SECUREEDGE5410
 	  This includes both the OEM SecureEdge products as well as the
 	  SME product line.
 
+config SH_HS7751RVOIP
+	bool "HS7751RVOIP"
+	help
+	  Select HS7751RVOIP if configuring for a Renesas Technology
+	  Sales VoIP board.
+
+config SH_RTS7751R2D
+	bool "RTS7751R2D"
+	help
+	  Select RTS7751R2D if configuring for a Renesas Technology
+	  Sales SH-Graphics board.
+
 config SH_UNKNOWN
 	bool "BareCPU"
 	help
@@ -186,7 +204,11 @@ config CPU_SUBTYPE_SH7604
 config CPU_SUBTYPE_SH7300
 	bool "SH7300"
 	depends on CPU_SH3
-	  
+
+config CPU_SUBTYPE_SH7705
+	bool "SH7705"
+	depends on CPU_SH3
+
 config CPU_SUBTYPE_SH7707
 	bool "SH7707"
 	depends on CPU_SH3
@@ -224,10 +246,17 @@ config CPU_SUBTYPE_SH7760
 	depends on CPU_SH4
 
 config CPU_SUBTYPE_ST40STB1
-	bool "ST40STB1"
-	depends on CPU_SH4
-	help
-	  Select ST40STB1 if you have a ST40STB1 CPU.
+       bool "ST40STB1 / ST40RA"
+       depends on CPU_SH4
+       help
+         Select ST40STB1 if you have a ST40RA CPU.
+         This was previously called the ST40STB1, hence the option name.
+
+config CPU_SUBTYPE_ST40GX1
+       bool "ST40GX1"
+       depends on CPU_SH4
+       help
+         Select ST40GX1 if you have a ST40GX1 CPU.
 
 endchoice
 
@@ -268,7 +297,7 @@ config CMDLINE
 config MEMORY_START
 	hex "Physical memory start address" if !MEMORY_SET || MEMORY_OVERRIDE
 	default "0x08000000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || SH_MPC1211 || SH_SECUREEDGE5410
-	default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE)
+	default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D)
 	---help---
 	  Computers built with Hitachi SuperH processors always
 	  map the ROM starting at address zero.  But the processor
@@ -287,7 +316,7 @@ config MEMORY_SIZE
 	hex "Physical memory size" if !MEMORY_SET || MEMORY_OVERRIDE
 	default "0x00400000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || !MEMORY_OVERRIDE && (SH_HP600 || SH_BIGSUR || SH_SH2000)
 	default "0x01000000" if !MEMORY_OVERRIDE && SH_DREAMCAST || SH_SECUREEDGE5410
-	default "0x04000000" if !MEMORY_OVERRIDE && SH_7751_SOLUTION_ENGINE
+	default "0x04000000" if !MEMORY_OVERRIDE && (SH_7751_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D)
 	default "0x02000000" if !MEMORY_OVERRIDE && SH_SOLUTION_ENGINE
 	default "0x08000000" if SH_MPC1211
 	help
@@ -299,7 +328,7 @@ config MEMORY_SIZE
 
 config MEMORY_SET
 	bool
-	depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410)
+	depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410 || SH_HS7751RVOIP || SH_RTS7751R2D)
 	default y
 	help
 	  This is an option about which you will never be asked a question.
@@ -358,7 +387,7 @@ config CF_BASE_ADDR
 # The SH7750 RTC module is disabled in the Dreamcast
 config SH_RTC
 	bool
-	depends on !SH_DREAMCAST && !SH_SATURN
+	depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE
 	default y
 	help
 	  Selecting this option will allow the Linux kernel to emulate
@@ -377,11 +406,26 @@ config SH_DSP
 
 	  This option must be set in order to enable the DSP.
 
+config SH_ADC
+	bool "ADC support"
+	depends on CPU_SH3
+	default y
+	help
+	  Selecting this option will allow the Linux kernel to use SH3 on-chip
+	  ADC module.
+
+	  If unsure, say N.
+
 config SH_HP600
 	bool
 	depends on SH_HP620 || SH_HP680 || SH_HP690
 	default y
 
+config CPU_SUBTYPE_ST40
+       bool
+       depends on CPU_SUBTYPE_ST40STB1 || CPU_SUBTYPE_ST40GX1
+       default y
+
 config DISCONTIGMEM
 	bool
 	depends on SH_HP690
@@ -514,10 +558,32 @@ config NR_CPUS
 	  This is purely to save memory - each supported CPU adds
 	  approximately eight kilobytes to the kernel image.
 
+config HS7751RVOIP_CODEC
+	bool "Support VoIP Codec section"
+	depends on SH_HS7751RVOIP
+	help
+	  Selecting this option will support CODEC section.
+
+config RTS7751R2D_REV11
+	bool "RTS7751R2D Rev. 1.1 board support"
+	depends on SH_RTS7751R2D
+	help
+	  Selecting this option will support version rev. 1.1.
+
+config SH_PCLK_CALC
+	bool
+	default n if CPU_SUBTYPE_SH7300
+	default y
+	help
+	  This option will cause the PCLK value to be probed at run-time. It
+	  will display a notification if the probed value has greater than a
+	  1% variance of the hardcoded CONFIG_SH_PCLK_FREQ.
+
 config SH_PCLK_FREQ
 	int "Peripheral clock frequency (in Hz)"
 	default "49876504" if CPU_SUBTYPE_SH7750
 	default "60013568" if CPU_SUBTYPE_SH7751
+	default "33333333" if CPU_SUBTYPE_SH7300
 	default "1193182"
 	help
 	  This option is used to specify the peripheral clock frequency. This
@@ -570,12 +636,18 @@ source "arch/sh/cchips/Kconfig"
 
 config HEARTBEAT
 	bool "Heartbeat LED"
-	depends on SH_MPC1211 || SH_CAT68701 || SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE
+	depends on SH_MPC1211 || SH_CAT68701 || SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_RTS7751R2D
 	help
 	  Use the power-on LED on your machine as a load meter.  The exact
 	  behavior is platform-dependent, but normally the flash frequency is
 	  a hyperbolic function of the 5-minute load average.
 
+config RTC_9701JE
+	tristate "EPSON RTC-9701JE support"
+	depends on SH_RTS7751R2D
+	help
+	  Selecting this option will support EPSON RTC-9701JE.
+
 endmenu
 
 
@@ -646,6 +718,24 @@ source "fs/Kconfig.binfmt"
 
 endmenu
 
+menu "SH initrd options"
+	depends on BLK_DEV_INITRD
+
+config EMBEDDED_RAMDISK
+	bool "Embed root filesystem ramdisk into the kernel"
+
+config EMBEDDED_RAMDISK_IMAGE
+	string "Filename of gziped ramdisk image"
+	depends on EMBEDDED_RAMDISK
+	default "ramdisk.gz"
+	help
+	  This is the filename of the ramdisk image to be built into the
+	  kernel.  Relative pathnames are relative to arch/mips/ramdisk/.
+	  The ramdisk image is not part of the kernel distribution; you must
+	  provide one yourself.
+
+endmenu
+
 source "drivers/Kconfig"
 
 source "fs/Kconfig"
@@ -675,6 +765,14 @@ config DEBUG_SPINLOCK
 	  best used in conjunction with the NMI watchdog so that spinlock
 	  deadlocks are also debuggable.
 
+config DEBUG_INFO
+        bool "Compile the kernel with debug info"
+        help
+          If you say Y here the resulting kernel image will include
+          debugging info resulting in a larger kernel image.
+          Say Y here only if you plan to use gdb to debug the kernel.
+          If you don't debug the kernel, you can say N.
+
 config SH_STANDARD_BIOS
 	bool "Use LinuxSH standard BIOS"
 	help
@@ -688,9 +786,13 @@ config SH_STANDARD_BIOS
 	  mask ROM and no flash (WindowsCE machines fall in this category).
 	  If unsure, say N.
 
-config SH_EARLY_PRINTK
+config EARLY_SCIF_CONSOLE
+	bool "Use early SCIF console"
+	depends on CPU_SH4
+
+config EARLY_PRINTK
 	bool "Early printk support"
-	depends on SH_STANDARD_BIOS
+	depends on SH_STANDARD_BIOS || EARLY_SCIF_CONSOLE
 	help
 	  Say Y here to redirect kernel printk messages to the serial port
 	  used by the SH-IPL bootloader, starting very early in the boot
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index ea63935f1a9e..7e0087146eb2 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -1,11 +1,11 @@
-# $Id: Makefile,v 1.34 2004/03/21 17:31:06 lethal Exp $
+# $Id: Makefile,v 1.35 2004/04/15 03:39:20 sugioka Exp $
 #
 # This file is subject to the terms and conditions of the GNU General Public
 # License.  See the file "COPYING" in the main directory of this archive
 # for more details.
 #
 # Copyright (C) 1999  Kaz Kojima
-# Copyright (C) 2002, 2003  Paul Mundt
+# Copyright (C) 2002, 2003, 2004  Paul Mundt
 # Copyright (C) 2002  M. R. Brown
 #
 # This file is included by the global makefile so that you can add your own
@@ -64,10 +64,18 @@ LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
 
 core-y				+= arch/sh/kernel/ arch/sh/mm/
 
+#
+# ramdisk/initrd support
+# You need a compressed ramdisk image, named
+# CONFIG_EMBEDDED_RAMDISK_IMAGE. Relative pathnames
+# are relative to arch/sh/ramdisk/.
+#
+core-$(CONFIG_EMBEDDED_RAMDISK)	+= arch/sh/ramdisk/
+
 # Boards
 machdir-$(CONFIG_SH_SOLUTION_ENGINE)		:= se/770x
 machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE)	:= se/7751
-machdir-$(CONFIG_SH_7751_SYSTEMH)		:= systemh
+machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE)	:= se/7300
 machdir-$(CONFIG_SH_STB1_HARP)			:= harp
 machdir-$(CONFIG_SH_STB1_OVERDRIVE)		:= overdrive
 machdir-$(CONFIG_SH_HP620)			:= hp6xx/hp620
@@ -84,19 +92,24 @@ machdir-$(CONFIG_SH_SH2000)			:= sh2000
 machdir-$(CONFIG_SH_ADX)			:= adx
 machdir-$(CONFIG_SH_MPC1211)			:= mpc1211
 machdir-$(CONFIG_SH_SECUREEDGE5410)		:= snapgear
+machdir-$(CONFIG_SH_HS7751RVOIP)		:= renesas/hs7751rvoip
+machdir-$(CONFIG_SH_RTS7751R2D)			:= renesas/rts7751r2d
+machdir-$(CONFIG_SH_7751_SYSTEMH)		:= renesas/systemh
 machdir-$(CONFIG_SH_UNKNOWN)			:= unknown
 
-incdir-y			:= $(machdir-y)
+incdir-y			:= $(notdir $(machdir-y))
 
 incdir-$(CONFIG_SH_SOLUTION_ENGINE)		:= se
 incdir-$(CONFIG_SH_7751_SOLUTION_ENGINE)	:= se7751
+incdir-$(CONFIG_SH_7300_SOLUTION_ENGINE)        := se7300
 incdir-$(CONFIG_SH_HP600)			:= hp6xx
 
 core-y				+= arch/sh/boards/$(machdir-y)/
 
 # Companion chips
-core-$(CONFIG_HD64461)	+= arch/sh/cchips/hd6446x/hd64461/
-core-$(CONFIG_HD64465)	+= arch/sh/cchips/hd6446x/hd64465/
+core-$(CONFIG_HD64461)		+= arch/sh/cchips/hd6446x/hd64461/
+core-$(CONFIG_HD64465)		+= arch/sh/cchips/hd6446x/hd64465/
+core-$(CONFIG_VOYAGERGX)	+= arch/sh/cchips/voyagergx/
 
 cpuincdir-$(CONFIG_CPU_SH2)	:= cpu-sh2
 cpuincdir-$(CONFIG_CPU_SH3)	:= cpu-sh3
@@ -114,6 +127,9 @@ AFLAGS_vmlinux.lds.o := -traditional
 prepare: target_links
 
 .PHONY: target_links FORCE
+
+all: zImage
+
 target_links:
 	@echo '  Making asm-sh/cpu -> asm-sh/$(cpuincdir-y) link'
 	@rm -f include/asm-sh/cpu
diff --git a/arch/sh/boards/renesas/hs7751rvoip/Makefile b/arch/sh/boards/renesas/hs7751rvoip/Makefile
new file mode 100644
index 000000000000..e8b4109ace11
--- /dev/null
+++ b/arch/sh/boards/renesas/hs7751rvoip/Makefile
@@ -0,0 +1,12 @@
+#
+# Makefile for the HS7751RVoIP specific parts of the kernel
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+obj-y	 := mach.o setup.o io.o irq.o led.o
+
+obj-$(CONFIG_PCI) += pci.o
+
diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c
new file mode 100644
index 000000000000..a2ecd2d6af53
--- /dev/null
+++ b/arch/sh/boards/renesas/hs7751rvoip/io.c
@@ -0,0 +1,310 @@
+/*
+ * linux/arch/sh/kernel/io_hs7751rvoip.c
+ *
+ * Copyright (C) 2001  Ian da Silva, Jeremy Siegel
+ * Based largely on io_se.c.
+ *
+ * I/O routine for Renesas Technology sales HS7751RVoIP
+ *
+ * Initial version only to support LAN access; some
+ * placeholder code from io_hs7751rvoip.c left in with the
+ * expectation of later SuperIO and PCMCIA access.
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <asm/io.h>
+#include <asm/hs7751rvoip/hs7751rvoip.h>
+#include <asm/addrspace.h>
+
+#include <linux/module.h>
+#include <linux/pci.h>
+#include "../../../drivers/pci/pci-sh7751.h"
+
+extern void *area5_io8_base;	/* Area 5 8bit I/O Base address */
+extern void *area6_io8_base;	/* Area 6 8bit I/O Base address */
+extern void *area5_io16_base;	/* Area 5 16bit I/O Base address */
+extern void *area6_io16_base;	/* Area 6 16bit I/O Base address */
+
+/*
+ * The 7751R HS7751RVoIP uses the built-in PCI controller (PCIC)
+ * of the 7751R processor, and has a SuperIO accessible via the PCI.
+ * The board also includes a PCMCIA controller on its memory bus,
+ * like the other Solution Engine boards.
+ */
+
+#define PCIIOBR		(volatile long *)PCI_REG(SH7751_PCIIOBR)
+#define PCIMBR          (volatile long *)PCI_REG(SH7751_PCIMBR)
+#define PCI_IO_AREA	SH7751_PCI_IO_BASE
+#define PCI_MEM_AREA	SH7751_PCI_CONFIG_BASE
+
+#define PCI_IOMAP(adr)	(PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
+
+#if defined(CONFIG_HS7751RVOIP_CODEC)
+#define CODEC_IO_BASE	0x1000
+#endif
+
+#define maybebadio(name,port) \
+  printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
+	 #name, (port), (__u32) __builtin_return_address(0))
+
+static inline void delay(void)
+{
+	ctrl_inw(0xa0000000);
+}
+
+static inline unsigned long port2adr(unsigned int port)
+{
+	if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
+		if (port == 0x3f6)
+			return ((unsigned long)area5_io16_base + 0x0c);
+		else
+			return ((unsigned long)area5_io16_base + 0x800 + ((port-0x1f0) << 1));
+	else
+		maybebadio(port2adr, (unsigned long)port);
+	return port;
+}
+
+/* The 7751R HS7751RVoIP seems to have everything hooked */
+/* up pretty normally (nothing on high-bytes only...) so this */
+/* shouldn't be needed */
+static inline int shifted_port(unsigned long port)
+{
+	/* For IDE registers, value is not shifted */
+	if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
+		return 0;
+	else
+		return 1;
+}
+
+#if defined(CONFIG_HS7751RVOIP_CODEC)
+static inline int
+codec_port(unsigned long port)
+{
+	if (CODEC_IO_BASE <= port && port < (CODEC_IO_BASE+0x20))
+		return 1;
+	else
+		return 0;
+}
+#endif
+
+/* In case someone configures the kernel w/o PCI support: in that */
+/* scenario, don't ever bother to check for PCI-window addresses */
+
+/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
+#if defined(CONFIG_PCI)
+#define CHECK_SH7751_PCIIO(port) \
+  ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
+#else
+#define CHECK_SH7751_PCIIO(port) (0)
+#endif
+
+/*
+ * General outline: remap really low stuff [eventually] to SuperIO,
+ * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
+ * is mapped through the PCI IO window.  Stuff with high bits (PXSEG)
+ * should be way beyond the window, and is used  w/o translation for
+ * compatibility.
+ */
+unsigned char hs7751rvoip_inb(unsigned long port)
+{
+	if (PXSEG(port))
+		return *(volatile unsigned char *)port;
+#if defined(CONFIG_HS7751RVOIP_CODEC)
+	else if (codec_port(port))
+		return *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE));
+#endif
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		return *(volatile unsigned char *)PCI_IOMAP(port);
+	else
+		return (*(volatile unsigned short *)port2adr(port) & 0xff);
+}
+
+unsigned char hs7751rvoip_inb_p(unsigned long port)
+{
+	unsigned char v;
+
+        if (PXSEG(port))
+                v = *(volatile unsigned char *)port;
+#if defined(CONFIG_HS7751RVOIP_CODEC)
+	else if (codec_port(port))
+		v = *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE));
+#endif
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+                v = *(volatile unsigned char *)PCI_IOMAP(port);
+	else
+		v = (*(volatile unsigned short *)port2adr(port) & 0xff);
+	delay();
+	return v;
+}
+
+unsigned short hs7751rvoip_inw(unsigned long port)
+{
+        if (PXSEG(port))
+                return *(volatile unsigned short *)port;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+                return *(volatile unsigned short *)PCI_IOMAP(port);
+	else
+		maybebadio(inw, port);
+	return 0;
+}
+
+unsigned int hs7751rvoip_inl(unsigned long port)
+{
+        if (PXSEG(port))
+                return *(volatile unsigned long *)port;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+                return *(volatile unsigned long *)PCI_IOMAP(port);
+	else
+		maybebadio(inl, port);
+	return 0;
+}
+
+void hs7751rvoip_outb(unsigned char value, unsigned long port)
+{
+
+        if (PXSEG(port))
+                *(volatile unsigned char *)port = value;
+#if defined(CONFIG_HS7751RVOIP_CIDEC)
+	else if (codec_port(port))
+		*(volatile unsigned cjar *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value;
+#endif
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+        	*(unsigned char *)PCI_IOMAP(port) = value;
+	else
+		*(volatile unsigned short *)port2adr(port) = value;
+}
+
+void hs7751rvoip_outb_p(unsigned char value, unsigned long port)
+{
+        if (PXSEG(port))
+                *(volatile unsigned char *)port = value;
+#if defined(CONFIG_HS7751RVOIP_CIDEC)
+	else if (codec_port(port))
+		*(volatile unsigned cjar *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value;
+#endif
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+        	*(unsigned char *)PCI_IOMAP(port) = value;
+	else
+		*(volatile unsigned short *)port2adr(port) = value;
+	delay();
+}
+
+void hs7751rvoip_outw(unsigned short value, unsigned long port)
+{
+        if (PXSEG(port))
+                *(volatile unsigned short *)port = value;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+        	*(unsigned short *)PCI_IOMAP(port) = value;
+	else
+		maybebadio(outw, port);
+}
+
+void hs7751rvoip_outl(unsigned int value, unsigned long port)
+{
+        if (PXSEG(port))
+                *(volatile unsigned long *)port = value;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+        	*((unsigned long *)PCI_IOMAP(port)) = value;
+	else
+		maybebadio(outl, port);
+}
+
+void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count)
+{
+	if (PXSEG(port))
+		while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)port;
+#if defined(CONFIG_HS7751RVOIP_CODEC)
+	else if (codec_port(port))
+		while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE));
+#endif
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) {
+		volatile __u8 *bp = (__u8 *)PCI_IOMAP(port);
+
+		while (count--) *((volatile unsigned char *) addr)++ = *bp;
+	} else {
+		volatile __u16 *p = (volatile unsigned short *)port2adr(port);
+
+		while (count--) *((unsigned char *) addr)++ = *p & 0xff;
+	}
+}
+
+void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count)
+{
+	volatile __u16 *p;
+
+	if (PXSEG(port))
+		p = (volatile unsigned short *)port;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		p = (volatile unsigned short *)PCI_IOMAP(port);
+	else
+		p = (volatile unsigned short *)port2adr(port);
+	while (count--) *((__u16 *) addr)++ = *p;
+}
+
+void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count)
+{
+	if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) {
+		volatile __u32 *p = (__u32 *)PCI_IOMAP(port);
+
+		while (count--) *((__u32 *) addr)++ = *p;
+	} else
+		maybebadio(insl, port);
+}
+
+void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count)
+{
+	if (PXSEG(port))
+		while (count--) *(volatile unsigned char *)port = *((unsigned char *) addr)++;
+#if defined(CONFIG_HS7751RVOIP_CODEC)
+	else if (codec_port(port))
+		while (count--) *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = *((unsigned char *) addr)++;
+#endif
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) {
+		volatile __u8 *bp = (__u8 *)PCI_IOMAP(port);
+
+		while (count--) *bp = *((volatile unsigned char *) addr)++;
+	} else {
+		volatile __u16 *p = (volatile unsigned short *)port2adr(port);
+
+		while (count--) *p = *((unsigned char *) addr)++;
+	}
+}
+
+void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count)
+{
+	volatile __u16 *p;
+
+	if (PXSEG(port))
+		p = (volatile unsigned short *)port;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		p = (volatile unsigned short *)PCI_IOMAP(port);
+	else
+		p = (volatile unsigned short *)port2adr(port);
+	while (count--) *p = *((__u16 *) addr)++;
+}
+
+void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count)
+{
+	if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) {
+		volatile __u32 *p = (__u32 *)PCI_IOMAP(port);
+
+		while (count--) *p = *((__u32 *) addr)++;
+	} else
+		maybebadio(outsl, port);
+}
+
+void *hs7751rvoip_ioremap(unsigned long offset, unsigned long size)
+{
+	if (offset >= 0xfd000000)
+		return (void *)offset;
+	else
+		return (void *)P2SEGADDR(offset);
+}
+EXPORT_SYMBOL(hs7751rvoip_ioremap);
+
+unsigned long hs7751rvoip_isa_port2addr(unsigned long offset)
+{
+	return port2adr(offset);
+}
diff --git a/arch/sh/boards/renesas/hs7751rvoip/irq.c b/arch/sh/boards/renesas/hs7751rvoip/irq.c
new file mode 100644
index 000000000000..a7921f67a35f
--- /dev/null
+++ b/arch/sh/boards/renesas/hs7751rvoip/irq.c
@@ -0,0 +1,122 @@
+/*
+ * linux/arch/sh/boards/renesas/hs7751rvoip/irq.c
+ *
+ * Copyright (C) 2000  Kazumoto Kojima
+ *
+ * Renesas Technology Sales HS7751RVoIP Support.
+ *
+ * Modified for HS7751RVoIP by
+ * Atom Create Engineering Co., Ltd. 2002.
+ * Lineo uSolutions, Inc. 2003.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/hs7751rvoip/hs7751rvoip.h>
+
+static int mask_pos[] = {8, 9, 10, 11, 12, 13, 0, 1, 2, 3, 4, 5, 6, 7};
+
+static void enable_hs7751rvoip_irq(unsigned int irq);
+static void disable_hs7751rvoip_irq(unsigned int irq);
+
+/* shutdown is same as "disable" */
+#define shutdown_hs7751rvoip_irq disable_hs7751rvoip_irq
+
+static void ack_hs7751rvoip_irq(unsigned int irq);
+static void end_hs7751rvoip_irq(unsigned int irq);
+
+static unsigned int startup_hs7751rvoip_irq(unsigned int irq)
+{
+	enable_hs7751rvoip_irq(irq);
+	return 0; /* never anything pending */
+}
+
+static void disable_hs7751rvoip_irq(unsigned int irq)
+{
+	unsigned long flags;
+	unsigned short val;
+	unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
+
+	/* Set the priority in IPR to 0 */
+	local_irq_save(flags);
+	val = ctrl_inw(IRLCNTR3);
+	val &= mask;
+	ctrl_outw(val, IRLCNTR3);
+	local_irq_restore(flags);
+}
+
+static void enable_hs7751rvoip_irq(unsigned int irq)
+{
+	unsigned long flags;
+	unsigned short val;
+	unsigned short value = (0x0001 << mask_pos[irq]);
+
+	/* Set priority in IPR back to original value */
+	local_irq_save(flags);
+	val = ctrl_inw(IRLCNTR3);
+	val |= value;
+	ctrl_outw(val, IRLCNTR3);
+	local_irq_restore(flags);
+}
+
+static void ack_hs7751rvoip_irq(unsigned int irq)
+{
+	disable_hs7751rvoip_irq(irq);
+}
+
+static void end_hs7751rvoip_irq(unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_hs7751rvoip_irq(irq);
+}
+
+static struct hw_interrupt_type hs7751rvoip_irq_type = {
+	"HS7751RVoIP IRQ",
+	startup_hs7751rvoip_irq,
+	shutdown_hs7751rvoip_irq,
+	enable_hs7751rvoip_irq,
+	disable_hs7751rvoip_irq,
+	ack_hs7751rvoip_irq,
+	end_hs7751rvoip_irq,
+};
+
+static void make_hs7751rvoip_irq(unsigned int irq)
+{
+	disable_irq_nosync(irq);
+	irq_desc[irq].handler = &hs7751rvoip_irq_type;
+	disable_hs7751rvoip_irq(irq);
+}
+
+/*
+ * Initialize IRQ setting
+ */
+void __init init_hs7751rvoip_IRQ(void)
+{
+	int i;
+
+	/* IRL0=ON HOOK1
+	 * IRL1=OFF HOOK1
+	 * IRL2=ON HOOK2
+	 * IRL3=OFF HOOK2
+	 * IRL4=Ringing Detection
+	 * IRL5=CODEC
+	 * IRL6=Ethernet
+	 * IRL7=Ethernet Hub
+	 * IRL8=USB Communication
+	 * IRL9=USB Connection
+	 * IRL10=USB DMA
+	 * IRL11=CF Card
+	 * IRL12=PCMCIA
+	 * IRL13=PCI Slot
+	 */
+	ctrl_outw(0x9876, IRLCNTR1);
+	ctrl_outw(0xdcba, IRLCNTR2);
+	ctrl_outw(0x0050, IRLCNTR4);
+	ctrl_outw(0x4321, IRLCNTR5);
+
+	for (i=0; i<14; i++)
+		make_hs7751rvoip_irq(i);
+}
diff --git a/arch/sh/boards/renesas/hs7751rvoip/led.c b/arch/sh/boards/renesas/hs7751rvoip/led.c
new file mode 100644
index 000000000000..18a13c8da8a4
--- /dev/null
+++ b/arch/sh/boards/renesas/hs7751rvoip/led.c
@@ -0,0 +1,27 @@
+/*
+ * linux/arch/sh/kernel/setup_hs7751rvoip.c
+ *
+ * Copyright (C) 2000  Kazumoto Kojima
+ *
+ * Renesas Technology Sales HS7751RVoIP Support.
+ *
+ * Modified for HS7751RVoIP by
+ * Atom Create Engineering Co., Ltd. 2002.
+ * Lineo uSolutions, Inc. 2003.
+ */
+
+#include <linux/config.h>
+#include <asm/io.h>
+#include <asm/hs7751rvoip/hs7751rvoip.h>
+
+extern unsigned int debug_counter;
+
+void debug_led_disp(void)
+{
+	unsigned short value;
+
+	value = (unsigned char)debug_counter++;
+	ctrl_outb((0xf0|value), PA_OUTPORTR);
+	if (value == 0x0f)
+		debug_counter = 0;
+}
diff --git a/arch/sh/boards/renesas/hs7751rvoip/mach.c b/arch/sh/boards/renesas/hs7751rvoip/mach.c
new file mode 100644
index 000000000000..8bbed60220ca
--- /dev/null
+++ b/arch/sh/boards/renesas/hs7751rvoip/mach.c
@@ -0,0 +1,55 @@
+/*
+ * linux/arch/sh/kernel/mach_hs7751rvoip.c
+ *
+ * Minor tweak of mach_se.c file to reference hs7751rvoip-specific items.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * Machine vector for the Renesas Technology sales HS7751RVoIP
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+
+#include <asm/machvec.h>
+#include <asm/rtc.h>
+#include <asm/irq.h>
+#include <asm/hs7751rvoip/io.h>
+
+extern void init_hs7751rvoip_IRQ(void);
+extern void *hs7751rvoip_ioremap(unsigned long, unsigned long);
+
+/*
+ * The Machine Vector
+ */
+
+struct sh_machine_vector mv_hs7751rvoip __initmv = {
+	.mv_nr_irqs		= 72,
+
+	.mv_inb			= hs7751rvoip_inb,
+	.mv_inw			= hs7751rvoip_inw,
+	.mv_inl			= hs7751rvoip_inl,
+	.mv_outb		= hs7751rvoip_outb,
+	.mv_outw		= hs7751rvoip_outw,
+	.mv_outl		= hs7751rvoip_outl,
+
+	.mv_inb_p		= hs7751rvoip_inb_p,
+	.mv_inw_p		= hs7751rvoip_inw,
+	.mv_inl_p		= hs7751rvoip_inl,
+	.mv_outb_p		= hs7751rvoip_outb_p,
+	.mv_outw_p		= hs7751rvoip_outw,
+	.mv_outl_p		= hs7751rvoip_outl,
+
+	.mv_insb		= hs7751rvoip_insb,
+	.mv_insw		= hs7751rvoip_insw,
+	.mv_insl		= hs7751rvoip_insl,
+	.mv_outsb		= hs7751rvoip_outsb,
+	.mv_outsw		= hs7751rvoip_outsw,
+	.mv_outsl		= hs7751rvoip_outsl,
+
+	.mv_ioremap		= hs7751rvoip_ioremap,
+	.mv_isa_port2addr	= hs7751rvoip_isa_port2addr,
+	.mv_init_irq		= init_hs7751rvoip_IRQ,
+};
+ALIAS_MV(hs7751rvoip)
diff --git a/arch/sh/boards/renesas/hs7751rvoip/pci.c b/arch/sh/boards/renesas/hs7751rvoip/pci.c
new file mode 100644
index 000000000000..7a442d1eca46
--- /dev/null
+++ b/arch/sh/boards/renesas/hs7751rvoip/pci.c
@@ -0,0 +1,150 @@
+/*
+ * linux/arch/sh/kernel/pci-hs7751rvoip.c
+ *
+ * Author:  Ian DaSilva (idasilva@mvista.com)
+ *
+ * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * PCI initialization for the Renesas SH7751R HS7751RVoIP board
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pci.h>
+#include <linux/module.h>
+
+#include <asm/io.h>
+#include "../../../drivers/pci/pci-sh7751.h"
+#include <asm/hs7751rvoip/hs7751rvoip.h>
+
+#define PCIMCR_MRSET_OFF	0xBFFFFFFF
+#define PCIMCR_RFSH_OFF		0xFFFFFFFB
+
+/*
+ * Only long word accesses of the PCIC's internal local registers and the
+ * configuration registers from the CPU is supported.
+ */
+#define PCIC_WRITE(x,v) writel((v), PCI_REG(x))
+#define PCIC_READ(x) readl(PCI_REG(x))
+
+/*
+ * Description:  This function sets up and initializes the pcic, sets
+ * up the BARS, maps the DRAM into the address space etc, etc.
+ */
+int __init pcibios_init_platform(void)
+{
+	unsigned long bcr1, wcr1, wcr2, wcr3, mcr;
+	unsigned short bcr2, bcr3;
+
+	/*
+	 * Initialize the slave bus controller on the pcic.  The values used
+	 * here should not be hardcoded, but they should be taken from the bsc
+	 * on the processor, to make this function as generic as possible.
+	 * (i.e. Another sbc may usr different SDRAM timing settings -- in order
+	 * for the pcic to work, its settings need to be exactly the same.)
+	 */
+	bcr1 = (*(volatile unsigned long *)(SH7751_BCR1));
+	bcr2 = (*(volatile unsigned short *)(SH7751_BCR2));
+	bcr3 = (*(volatile unsigned short *)(SH7751_BCR3));
+	wcr1 = (*(volatile unsigned long *)(SH7751_WCR1));
+	wcr2 = (*(volatile unsigned long *)(SH7751_WCR2));
+	wcr3 = (*(volatile unsigned long *)(SH7751_WCR3));
+	mcr = (*(volatile unsigned long *)(SH7751_MCR));
+
+	bcr1 = bcr1 | 0x00080000;  /* Enable Bit 19, BREQEN */
+	(*(volatile unsigned long *)(SH7751_BCR1)) = bcr1;
+
+	bcr1 = bcr1 | 0x40080000;  /* Enable Bit 19 BREQEN, set PCIC to slave */
+	PCIC_WRITE(SH7751_PCIBCR1, bcr1);	/* PCIC BCR1 */
+	PCIC_WRITE(SH7751_PCIBCR2, bcr2);	/* PCIC BCR2 */
+	PCIC_WRITE(SH7751_PCIBCR3, bcr3);	/* PCIC BCR3 */
+	PCIC_WRITE(SH7751_PCIWCR1, wcr1);	/* PCIC WCR1 */
+	PCIC_WRITE(SH7751_PCIWCR2, wcr2);	/* PCIC WCR2 */
+	PCIC_WRITE(SH7751_PCIWCR3, wcr3);	/* PCIC WCR3 */
+	mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
+	PCIC_WRITE(SH7751_PCIMCR, mcr);		/* PCIC MCR */
+
+	/* Enable all interrupts, so we know what to fix */
+	PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff);
+	PCIC_WRITE(SH7751_PCIAINTM, 0x0000380f);
+
+	/* Set up standard PCI config registers */
+	PCIC_WRITE(SH7751_PCICONF1, 0xFB900047); /* Bus Master, Mem & I/O access */
+	PCIC_WRITE(SH7751_PCICONF2, 0x00000000); /* PCI Class code & Revision ID */
+	PCIC_WRITE(SH7751_PCICONF4, 0xab000001); /* PCI I/O address (local regs) */
+	PCIC_WRITE(SH7751_PCICONF5, 0x0c000000); /* PCI MEM address (local RAM)  */
+	PCIC_WRITE(SH7751_PCICONF6, 0xd0000000); /* PCI MEM address (unused) */
+	PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Subsystem ID & Vendor ID */
+	PCIC_WRITE(SH7751_PCILSR0, 0x03f00000);	/* MEM (full 64M exposed) */
+	PCIC_WRITE(SH7751_PCILSR1, 0x00000000); /* MEM (unused) */
+	PCIC_WRITE(SH7751_PCILAR0, 0x0c000000); /* MEM (direct map from PCI) */
+	PCIC_WRITE(SH7751_PCILAR1, 0x00000000); /* MEM (unused) */
+
+	/* Now turn it on... */
+	PCIC_WRITE(SH7751_PCICR, 0xa5000001);
+
+	/*
+	 * Set PCIMBR and PCIIOBR here, assuming a single window
+	 * (16M MEM, 256K IO) is enough.  If a larger space is
+	 * needed, the readx/writex and inx/outx functions will
+	 * have to do more (e.g. setting registers for each call).
+	 */
+
+	/*
+	 * Set the MBR so PCI address is one-to-one with window,
+	 * meaning all calls go straight through... use ifdef to
+	 * catch erroneous assumption.
+	 */
+	BUG_ON(PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE);
+
+	PCIC_WRITE(SH7751_PCIMBR, PCIBIOS_MIN_MEM);
+
+	/* Set IOBR for window containing area specified in pci.h */
+	PCIC_WRITE(SH7751_PCIIOBR, (PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK));
+
+	/* All done, may as well say so... */
+	printk("SH7751R PCI: Finished initialization of the PCI controller\n");
+
+	return 1;
+}
+
+int __init pcibios_map_platform_irq(u8 slot, u8 pin)
+{
+        switch (slot) {
+	case 0: return IRQ_PCISLOT;	/* PCI Extend slot */
+	case 1: return IRQ_PCMCIA;	/* PCI Cardbus Bridge */
+	case 2: return IRQ_PCIETH;	/* Realtek Ethernet controller */
+	case 3: return IRQ_PCIHUB;	/* Realtek Ethernet Hub controller */
+	default:
+		printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
+		return -1;
+	}
+}
+
+static struct resource sh7751_io_resource = {
+	.name	= "SH7751_IO",
+	.start	= 0x4000,
+	.end	= 0x4000 + SH7751_PCI_IO_SIZE - 1,
+	.flags	= IORESOURCE_IO
+};
+
+static struct resource sh7751_mem_resource = {
+	.name	= "SH7751_mem",
+	.start	= SH7751_PCI_MEMORY_BASE,
+	.end	= SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
+	.flags	= IORESOURCE_MEM
+};
+
+extern struct pci_ops sh7751_pci_ops;
+
+struct pci_channel board_pci_channels[] = {
+	{ &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
+	{ NULL, NULL, NULL, 0, 0 },
+};
+EXPORT_SYMBOL(board_pci_channels);
diff --git a/arch/sh/boards/renesas/hs7751rvoip/setup.c b/arch/sh/boards/renesas/hs7751rvoip/setup.c
new file mode 100644
index 000000000000..f1a78b6c714c
--- /dev/null
+++ b/arch/sh/boards/renesas/hs7751rvoip/setup.c
@@ -0,0 +1,89 @@
+/*
+ * linux/arch/sh/kernel/setup_hs7751rvoip.c
+ *
+ * Copyright (C) 2000  Kazumoto Kojima
+ *
+ * Renesas Technology Sales HS7751RVoIP Support.
+ *
+ * Modified for HS7751RVoIP by
+ * Atom Create Engineering Co., Ltd. 2002.
+ * Lineo uSolutions, Inc. 2003.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <linux/hdreg.h>
+#include <linux/ide.h>
+#include <asm/io.h>
+#include <asm/hs7751rvoip/hs7751rvoip.h>
+
+#include <linux/mm.h>
+#include <linux/vmalloc.h>
+
+/* defined in mm/ioremap.c */
+extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
+
+unsigned int debug_counter;
+
+const char *get_system_type(void)
+{
+	return "HS7751RVoIP";
+}
+
+/*
+ * Initialize the board
+ */
+void __init platform_setup(void)
+{
+	printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n");
+	ctrl_outb(0xf0, PA_OUTPORTR);
+	debug_counter = 0;
+}
+
+void *area5_io8_base;
+void *area6_io8_base;
+void *area5_io16_base;
+void *area6_io16_base;
+
+int __init cf_init(void)
+{
+	pgprot_t prot;
+	unsigned long paddrbase, psize;
+
+	/* open I/O area window */
+	paddrbase = virt_to_phys((void *)(PA_AREA5_IO+0x00000800));
+	psize = PAGE_SIZE;
+	prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_COM16);
+	area5_io16_base = p3_ioremap(paddrbase, psize, prot.pgprot);
+	if (!area5_io16_base) {
+		printk("allocate_cf_area : can't open CF I/O window!\n");
+		return -ENOMEM;
+	}
+
+	/* XXX : do we need attribute and common-memory area also? */
+
+	paddrbase = virt_to_phys((void *)PA_AREA6_IO);
+	psize = PAGE_SIZE;
+#if defined(CONFIG_HS7751RVOIP_CODEC)
+	prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_COM8);
+#else
+	prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO8);
+#endif
+	area6_io8_base = p3_ioremap(paddrbase, psize, prot.pgprot);
+	if (!area6_io8_base) {
+		printk("allocate_cf_area : can't open CODEC I/O 8bit window!\n");
+		return -ENOMEM;
+	}
+	prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16);
+	area6_io16_base = p3_ioremap(paddrbase, psize, prot.pgprot);
+	if (!area6_io16_base) {
+		printk("allocate_cf_area : can't open CODEC I/O 16bit window!\n");
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+__initcall (cf_init);
diff --git a/arch/sh/boards/renesas/rts7751r2d/Makefile b/arch/sh/boards/renesas/rts7751r2d/Makefile
new file mode 100644
index 000000000000..daa53334bdc3
--- /dev/null
+++ b/arch/sh/boards/renesas/rts7751r2d/Makefile
@@ -0,0 +1,10 @@
+#
+# Makefile for the RTS7751R2D specific parts of the kernel
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+obj-y	 := mach.o setup.o io.o irq.o led.o
+
diff --git a/arch/sh/boards/renesas/rts7751r2d/io.c b/arch/sh/boards/renesas/rts7751r2d/io.c
new file mode 100644
index 000000000000..c46f9154cfd5
--- /dev/null
+++ b/arch/sh/boards/renesas/rts7751r2d/io.c
@@ -0,0 +1,319 @@
+/*
+ * linux/arch/sh/kernel/io_rts7751r2d.c
+ *
+ * Copyright (C) 2001  Ian da Silva, Jeremy Siegel
+ * Based largely on io_se.c.
+ *
+ * I/O routine for Renesas Technology sales RTS7751R2D.
+ *
+ * Initial version only to support LAN access; some
+ * placeholder code from io_rts7751r2d.c left in with the
+ * expectation of later SuperIO and PCMCIA access.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <asm/io.h>
+#include <asm/rts7751r2d/rts7751r2d.h>
+#include <asm/addrspace.h>
+
+#include <linux/module.h>
+#include <linux/pci.h>
+#include "../../../drivers/pci/pci-sh7751.h"
+
+/*
+ * The 7751R RTS7751R2D uses the built-in PCI controller (PCIC)
+ * of the 7751R processor, and has a SuperIO accessible via the PCI.
+ * The board also includes a PCMCIA controller on its memory bus,
+ * like the other Solution Engine boards.
+ */
+
+#define PCIIOBR		(volatile long *)PCI_REG(SH7751_PCIIOBR)
+#define PCIMBR          (volatile long *)PCI_REG(SH7751_PCIMBR)
+#define PCI_IO_AREA	SH7751_PCI_IO_BASE
+#define PCI_MEM_AREA	SH7751_PCI_CONFIG_BASE
+
+#define PCI_IOMAP(adr)	(PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
+
+#define maybebadio(name,port) \
+  printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
+	 #name, (port), (__u32) __builtin_return_address(0))
+
+static inline void delay(void)
+{
+	ctrl_inw(0xa0000000);
+}
+
+static inline unsigned long port2adr(unsigned int port)
+{
+	if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
+		if (port == 0x3f6)
+			return (PA_AREA5_IO + 0x80c);
+		else
+			return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
+	else
+		maybebadio(port2adr, (unsigned long)port);
+
+	return port;
+}
+
+static inline unsigned long port88796l(unsigned int port, int flag)
+{
+	unsigned long addr;
+
+	if (flag)
+		addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1);
+	else
+		addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1) + 0x1000;
+
+	return addr;
+}
+
+/* The 7751R RTS7751R2D seems to have everything hooked */
+/* up pretty normally (nothing on high-bytes only...) so this */
+/* shouldn't be needed */
+static inline int shifted_port(unsigned long port)
+{
+	/* For IDE registers, value is not shifted */
+	if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
+		return 0;
+	else
+		return 1;
+}
+
+/* In case someone configures the kernel w/o PCI support: in that */
+/* scenario, don't ever bother to check for PCI-window addresses */
+
+/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
+#if defined(CONFIG_PCI)
+#define CHECK_SH7751_PCIIO(port) \
+  ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
+#else
+#define CHECK_SH7751_PCIIO(port) (0)
+#endif
+
+#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
+#define CHECK_AX88796L_PORT(port) \
+  ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
+#else
+#define CHECK_AX88796L_PORT(port) (0)
+#endif
+
+/*
+ * General outline: remap really low stuff [eventually] to SuperIO,
+ * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
+ * is mapped through the PCI IO window.  Stuff with high bits (PXSEG)
+ * should be way beyond the window, and is used  w/o translation for
+ * compatibility.
+ */
+unsigned char rts7751r2d_inb(unsigned long port)
+{
+	if (CHECK_AX88796L_PORT(port))
+		return (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
+	else if (PXSEG(port))
+		return *(volatile unsigned char *)port;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		return *(volatile unsigned char *)PCI_IOMAP(port);
+	else
+		return (*(volatile unsigned short *)port2adr(port) & 0xff);
+}
+
+unsigned char rts7751r2d_inb_p(unsigned long port)
+{
+	unsigned char v;
+
+	if (CHECK_AX88796L_PORT(port))
+		v = (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
+        else if (PXSEG(port))
+		v = *(volatile unsigned char *)port;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		v = *(volatile unsigned char *)PCI_IOMAP(port);
+	else
+		v = (*(volatile unsigned short *)port2adr(port) & 0xff);
+	delay();
+
+	return v;
+}
+
+unsigned short rts7751r2d_inw(unsigned long port)
+{
+	if (CHECK_AX88796L_PORT(port))
+		maybebadio(inw, port);
+        else if (PXSEG(port))
+		return *(volatile unsigned short *)port;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		return *(volatile unsigned short *)PCI_IOMAP(port);
+	else
+		maybebadio(inw, port);
+
+	return 0;
+}
+
+unsigned int rts7751r2d_inl(unsigned long port)
+{
+	if (CHECK_AX88796L_PORT(port))
+		maybebadio(inl, port);
+        else if (PXSEG(port))
+		return *(volatile unsigned long *)port;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		return *(volatile unsigned long *)PCI_IOMAP(port);
+	else
+		maybebadio(inl, port);
+
+	return 0;
+}
+
+void rts7751r2d_outb(unsigned char value, unsigned long port)
+{
+	if (CHECK_AX88796L_PORT(port))
+		*((volatile unsigned short *)port88796l(port, 0)) = value;
+        else if (PXSEG(port))
+		*(volatile unsigned char *)port = value;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		*(volatile unsigned char *)PCI_IOMAP(port) = value;
+	else
+		*(volatile unsigned short *)port2adr(port) = value;
+}
+
+void rts7751r2d_outb_p(unsigned char value, unsigned long port)
+{
+	if (CHECK_AX88796L_PORT(port))
+		*((volatile unsigned short *)port88796l(port, 0)) = value;
+        else if (PXSEG(port))
+		*(volatile unsigned char *)port = value;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		*(volatile unsigned char *)PCI_IOMAP(port) = value;
+	else
+		*(volatile unsigned short *)port2adr(port) = value;
+	delay();
+}
+
+void rts7751r2d_outw(unsigned short value, unsigned long port)
+{
+	if (CHECK_AX88796L_PORT(port))
+		maybebadio(outw, port);
+        else if (PXSEG(port))
+		*(volatile unsigned short *)port = value;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		*(volatile unsigned short *)PCI_IOMAP(port) = value;
+	else
+		maybebadio(outw, port);
+}
+
+void rts7751r2d_outl(unsigned int value, unsigned long port)
+{
+	if (CHECK_AX88796L_PORT(port))
+		maybebadio(outl, port);
+        else if (PXSEG(port))
+		*(volatile unsigned long *)port = value;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		*(volatile unsigned long *)PCI_IOMAP(port) = value;
+	else
+		maybebadio(outl, port);
+}
+
+void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count)
+{
+	volatile __u8 *bp;
+	volatile __u16 *p;
+
+	if (CHECK_AX88796L_PORT(port)) {
+		p = (volatile unsigned short *)port88796l(port, 0);
+		while (count--) *((unsigned char *) addr)++ = *p & 0xff;
+	} else if (PXSEG(port))
+		while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)port;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) {
+		bp = (__u8 *)PCI_IOMAP(port);
+		while (count--) *((volatile unsigned char *) addr)++ = *bp;
+	} else {
+		p = (volatile unsigned short *)port2adr(port);
+		while (count--) *((unsigned char *) addr)++ = *p & 0xff;
+	}
+}
+
+void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count)
+{
+	volatile __u16 *p;
+
+	if (CHECK_AX88796L_PORT(port))
+		p = (volatile unsigned short *)port88796l(port, 1);
+	else if (PXSEG(port))
+		p = (volatile unsigned short *)port;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		p = (volatile unsigned short *)PCI_IOMAP(port);
+	else
+		p = (volatile unsigned short *)port2adr(port);
+	while (count--) *((__u16 *) addr)++ = *p;
+}
+
+void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count)
+{
+	if (CHECK_AX88796L_PORT(port))
+		maybebadio(insl, port);
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) {
+		volatile __u32 *p = (__u32 *)PCI_IOMAP(port);
+
+		while (count--) *((__u32 *) addr)++ = *p;
+	} else
+		maybebadio(insl, port);
+}
+
+void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count)
+{
+	volatile __u8 *bp;
+	volatile __u16 *p;
+
+	if (CHECK_AX88796L_PORT(port)) {
+		p = (volatile unsigned short *)port88796l(port, 0);
+		while (count--) *p = *((unsigned char *) addr)++;
+	} else if (PXSEG(port))
+		while (count--) *(volatile unsigned char *)port = *((unsigned char *) addr)++;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) {
+		bp = (__u8 *)PCI_IOMAP(port);
+		while (count--) *bp = *((volatile unsigned char *) addr)++;
+	} else {
+		p = (volatile unsigned short *)port2adr(port);
+		while (count--) *p = *((unsigned char *) addr)++;
+	}
+}
+
+void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count)
+{
+	volatile __u16 *p;
+
+	if (CHECK_AX88796L_PORT(port))
+		p = (volatile unsigned short *)port88796l(port, 1);
+	else if (PXSEG(port))
+		p = (volatile unsigned short *)port;
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port))
+		p = (volatile unsigned short *)PCI_IOMAP(port);
+	else
+		p = (volatile unsigned short *)port2adr(port);
+	while (count--) *p = *((__u16 *) addr)++;
+}
+
+void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count)
+{
+	if (CHECK_AX88796L_PORT(port))
+		maybebadio(outsl, port);
+	else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) {
+		volatile __u32 *p = (__u32 *)PCI_IOMAP(port);
+
+		while (count--) *p = *((__u32 *) addr)++;
+	} else
+		maybebadio(outsl, port);
+}
+
+void *rts7751r2d_ioremap(unsigned long offset, unsigned long size)
+{
+	if (offset >= 0xfd000000)
+		return (void *)offset;
+	else
+		return (void *)P2SEGADDR(offset);
+}
+EXPORT_SYMBOL(rts7751r2d_ioremap);
+
+unsigned long rts7751r2d_isa_port2addr(unsigned long offset)
+{
+	return port2adr(offset);
+}
diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c
new file mode 100644
index 000000000000..95717f4f1e2d
--- /dev/null
+++ b/arch/sh/boards/renesas/rts7751r2d/irq.c
@@ -0,0 +1,135 @@
+/*
+ * linux/arch/sh/boards/renesas/rts7751r2d/irq.c
+ *
+ * Copyright (C) 2000  Kazumoto Kojima
+ *
+ * Renesas Technology Sales RTS7751R2D Support.
+ *
+ * Modified for RTS7751R2D by
+ * Atom Create Engineering Co., Ltd. 2002.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/rts7751r2d/rts7751r2d.h>
+
+#if defined(CONFIG_RTS7751R2D_REV11)
+static int mask_pos[] = {11, 9, 8, 12, 10, 6, 5, 4, 7, 14, 13, 0, 0, 0, 0};
+#else
+static int mask_pos[] = {6, 11, 9, 8, 12, 10, 5, 4, 7, 14, 13, 0, 0, 0, 0};
+#endif
+
+extern int voyagergx_irq_demux(int irq);
+extern void setup_voyagergx_irq(void);
+
+static void enable_rts7751r2d_irq(unsigned int irq);
+static void disable_rts7751r2d_irq(unsigned int irq);
+
+/* shutdown is same as "disable" */
+#define shutdown_rts7751r2d_irq disable_rts7751r2d_irq
+
+static void ack_rts7751r2d_irq(unsigned int irq);
+static void end_rts7751r2d_irq(unsigned int irq);
+
+static unsigned int startup_rts7751r2d_irq(unsigned int irq)
+{
+	enable_rts7751r2d_irq(irq);
+	return 0; /* never anything pending */
+}
+
+static void disable_rts7751r2d_irq(unsigned int irq)
+{
+	unsigned long flags;
+	unsigned short val;
+	unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
+
+	/* Set the priority in IPR to 0 */
+	local_irq_save(flags);
+	val = ctrl_inw(IRLCNTR1);
+	val &= mask;
+	ctrl_outw(val, IRLCNTR1);
+	local_irq_restore(flags);
+}
+
+static void enable_rts7751r2d_irq(unsigned int irq)
+{
+	unsigned long flags;
+	unsigned short val;
+	unsigned short value = (0x0001 << mask_pos[irq]);
+
+	/* Set priority in IPR back to original value */
+	local_irq_save(flags);
+	val = ctrl_inw(IRLCNTR1);
+	val |= value;
+	ctrl_outw(val, IRLCNTR1);
+	local_irq_restore(flags);
+}
+
+int rts7751r2d_irq_demux(int irq)
+{
+	int demux_irq;
+
+	demux_irq = voyagergx_irq_demux(irq);
+	return demux_irq;
+}
+
+static void ack_rts7751r2d_irq(unsigned int irq)
+{
+	disable_rts7751r2d_irq(irq);
+}
+
+static void end_rts7751r2d_irq(unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_rts7751r2d_irq(irq);
+}
+
+static struct hw_interrupt_type rts7751r2d_irq_type = {
+	"RTS7751R2D IRQ",
+	startup_rts7751r2d_irq,
+	shutdown_rts7751r2d_irq,
+	enable_rts7751r2d_irq,
+	disable_rts7751r2d_irq,
+	ack_rts7751r2d_irq,
+	end_rts7751r2d_irq,
+};
+
+static void make_rts7751r2d_irq(unsigned int irq)
+{
+	disable_irq_nosync(irq);
+	irq_desc[irq].handler = &rts7751r2d_irq_type;
+	disable_rts7751r2d_irq(irq);
+}
+
+/*
+ * Initialize IRQ setting
+ */
+void __init init_rts7751r2d_IRQ(void)
+{
+	int i;
+
+	/* IRL0=KEY Input
+	 * IRL1=Ethernet
+	 * IRL2=CF Card
+	 * IRL3=CF Card Insert
+	 * IRL4=PCMCIA
+	 * IRL5=VOYAGER
+	 * IRL6=RTC Alarm
+	 * IRL7=RTC Timer
+	 * IRL8=SD Card
+	 * IRL9=PCI Slot #1
+	 * IRL10=PCI Slot #2
+	 * IRL11=Extention #0
+	 * IRL12=Extention #1
+	 * IRL13=Extention #2
+	 * IRL14=Extention #3
+	 */
+
+	for (i=0; i<15; i++)
+		make_rts7751r2d_irq(i);
+
+	setup_voyagergx_irq();
+}
diff --git a/arch/sh/boards/renesas/rts7751r2d/led.c b/arch/sh/boards/renesas/rts7751r2d/led.c
new file mode 100644
index 000000000000..9993259a894f
--- /dev/null
+++ b/arch/sh/boards/renesas/rts7751r2d/led.c
@@ -0,0 +1,67 @@
+/*
+ * linux/arch/sh/kernel/led_rts7751r2d.c
+ *
+ * Copyright (C) Atom Create Engineering Co., Ltd.
+ *
+ * May be copied or modified under the terms of GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * This file contains Renesas Technology Sales RTS7751R2D specific LED code.
+ */
+
+#include <linux/config.h>
+#include <asm/io.h>
+#include <asm/rts7751r2d/rts7751r2d.h>
+
+extern unsigned int debug_counter;
+
+#ifdef CONFIG_HEARTBEAT
+
+#include <linux/sched.h>
+
+/* Cycle the LED's in the clasic Knightriger/Sun pattern */
+void heartbeat_rts7751r2d(void)
+{
+	static unsigned int cnt = 0, period = 0;
+	volatile unsigned short *p = (volatile unsigned short *)PA_OUTPORT;
+	static unsigned bit = 0, up = 1;
+
+	cnt += 1;
+	if (cnt < period)
+		return;
+
+	cnt = 0;
+
+	/* Go through the points (roughly!):
+	 * f(0)=10, f(1)=16, f(2)=20, f(5)=35, f(int)->110
+	 */
+	period = 110 - ((300 << FSHIFT)/((avenrun[0]/5) + (3<<FSHIFT)));
+
+	*p = 1 << bit;
+	if (up)
+		if (bit == 7) {
+			bit--;
+			up = 0;
+		} else
+			bit++;
+	else if (bit == 0)
+		up = 1;
+	else
+		bit--;
+}
+#endif /* CONFIG_HEARTBEAT */
+
+void rts7751r2d_led(unsigned short value)
+{
+	ctrl_outw(value, PA_OUTPORT);
+}
+
+void debug_led_disp(void)
+{
+	unsigned short value;
+
+	value = (unsigned short)debug_counter++;
+	rts7751r2d_led(value);
+	if (value == 0xff)
+		debug_counter = 0;
+}
diff --git a/arch/sh/boards/renesas/rts7751r2d/mach.c b/arch/sh/boards/renesas/rts7751r2d/mach.c
new file mode 100644
index 000000000000..c1ff45407ab4
--- /dev/null
+++ b/arch/sh/boards/renesas/rts7751r2d/mach.c
@@ -0,0 +1,68 @@
+/*
+ * linux/arch/sh/kernel/mach_rts7751r2d.c
+ *
+ * Minor tweak of mach_se.c file to reference rts7751r2d-specific items.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * Machine vector for the Renesas Technology sales RTS7751R2D
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/types.h>
+
+#include <asm/machvec.h>
+#include <asm/rtc.h>
+#include <asm/irq.h>
+#include <asm/rts7751r2d/io.h>
+
+extern void heartbeat_rts7751r2d(void);
+extern void init_rts7751r2d_IRQ(void);
+extern void *rts7751r2d_ioremap(unsigned long, unsigned long);
+extern int rts7751r2d_irq_demux(int irq);
+
+extern void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, int);
+extern void voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t);
+
+/*
+ * The Machine Vector
+ */
+
+struct sh_machine_vector mv_rts7751r2d __initmv = {
+	.mv_nr_irqs		= 72,
+
+	.mv_inb			= rts7751r2d_inb,
+	.mv_inw			= rts7751r2d_inw,
+	.mv_inl			= rts7751r2d_inl,
+	.mv_outb		= rts7751r2d_outb,
+	.mv_outw		= rts7751r2d_outw,
+	.mv_outl		= rts7751r2d_outl,
+
+	.mv_inb_p		= rts7751r2d_inb_p,
+	.mv_inw_p		= rts7751r2d_inw,
+	.mv_inl_p		= rts7751r2d_inl,
+	.mv_outb_p		= rts7751r2d_outb_p,
+	.mv_outw_p		= rts7751r2d_outw,
+	.mv_outl_p		= rts7751r2d_outl,
+
+	.mv_insb		= rts7751r2d_insb,
+	.mv_insw		= rts7751r2d_insw,
+	.mv_insl		= rts7751r2d_insl,
+	.mv_outsb		= rts7751r2d_outsb,
+	.mv_outsw		= rts7751r2d_outsw,
+	.mv_outsl		= rts7751r2d_outsl,
+
+	.mv_ioremap		= rts7751r2d_ioremap,
+	.mv_isa_port2addr	= rts7751r2d_isa_port2addr,
+	.mv_init_irq		= init_rts7751r2d_IRQ,
+#ifdef CONFIG_HEARTBEAT
+	.mv_heartbeat		= heartbeat_rts7751r2d,
+#endif
+	.mv_irq_demux		= rts7751r2d_irq_demux,
+
+	.mv_consistent_alloc	= voyagergx_consistent_alloc,
+	.mv_consistent_free	= voyagergx_consistent_free,
+};
+ALIAS_MV(rts7751r2d)
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
new file mode 100644
index 000000000000..2587fd1a0240
--- /dev/null
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -0,0 +1,31 @@
+/*
+ * linux/arch/sh/kernel/setup_rts7751r2d.c
+ *
+ * Copyright (C) 2000  Kazumoto Kojima
+ *
+ * Renesas Technology Sales RTS7751R2D Support.
+ *
+ * Modified for RTS7751R2D by
+ * Atom Create Engineering Co., Ltd. 2002.
+ */
+
+#include <linux/init.h>
+#include <asm/io.h>
+#include <asm/rts7751r2d/rts7751r2d.h>
+
+unsigned int debug_counter;
+
+const char *get_system_type(void)
+{
+	return "RTS7751R2D";
+}
+
+/*
+ * Initialize the board
+ */
+void __init platform_setup(void)
+{
+	printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
+	ctrl_outw(0x0000, PA_OUTPORT);
+	debug_counter = 0;
+}
diff --git a/arch/sh/boards/systemh/Makefile b/arch/sh/boards/renesas/systemh/Makefile
index 858d4d918dc9..2cc6a23d9d39 100644
--- a/arch/sh/boards/systemh/Makefile
+++ b/arch/sh/boards/renesas/systemh/Makefile
@@ -9,5 +9,5 @@ obj-y	 := setup.o irq.o io.o
 # just abuse the hell out of kbuild, because we can..
 
 obj-$(CONFIG_PCI) += pci.o
-pci-y := ../se/7751/pci.o
+pci-y := ../../se/7751/pci.o
 
diff --git a/arch/sh/boards/systemh/io.c b/arch/sh/boards/renesas/systemh/io.c
index bb10cb6c65a6..cf979011aa94 100644
--- a/arch/sh/boards/systemh/io.c
+++ b/arch/sh/boards/renesas/systemh/io.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * linux/arch/sh/boards/systemh/io.c
  *
  * Copyright (C) 2001  Ian da Silva, Jeremy Siegel
@@ -19,9 +19,9 @@
 
 /*
  * The 7751 SystemH Engine uses the built-in PCI controller (PCIC)
- * of the 7751 processor, and has a SuperIO accessible on its memory 
+ * of the 7751 processor, and has a SuperIO accessible on its memory
  * bus.
- */ 
+ */
 
 #define PCIIOBR		(volatile long *)PCI_REG(SH7751_PCIIOBR)
 #define PCIMBR          (volatile long *)PCI_REG(SH7751_PCIMBR)
@@ -30,7 +30,7 @@
 
 #define PCI_IOMAP(adr)	(PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
 #define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area
-                                                of smc lan chip*/ 
+                                                of smc lan chip*/
 
 #define maybebadio(name,port) \
   printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
@@ -81,7 +81,7 @@ unsigned char sh7751systemh_inb(unsigned long port)
 	else if (port <= 0x3F1)
 		return *(volatile unsigned char *)ETHER_IOMAP(port);
 	else
-		return (*port2adr(port))&0xff; 
+		return (*port2adr(port))&0xff;
 }
 
 unsigned char sh7751systemh_inb_p(unsigned long port)
@@ -95,7 +95,7 @@ unsigned char sh7751systemh_inb_p(unsigned long port)
 	else if (port <= 0x3F1)
 		v = *(volatile unsigned char *)ETHER_IOMAP(port);
 	else
-		v = (*port2adr(port))&0xff; 
+		v = (*port2adr(port))&0xff;
 	delay();
 	return v;
 }
diff --git a/arch/sh/boards/systemh/irq.c b/arch/sh/boards/renesas/systemh/irq.c
index cc9ea89b9509..5675a4134eee 100644
--- a/arch/sh/boards/systemh/irq.c
+++ b/arch/sh/boards/renesas/systemh/irq.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * linux/arch/sh/boards/systemh/irq.c
  *
  * Copyright (C) 2000  Kazumoto Kojima
@@ -45,7 +45,7 @@ static struct hw_interrupt_type systemh_irq_type = {
 };
 
 static unsigned int startup_systemh_irq(unsigned int irq)
-{ 
+{
 	enable_systemh_irq(irq);
 	return 0; /* never anything pending */
 }
diff --git a/arch/sh/boards/systemh/setup.c b/arch/sh/boards/renesas/systemh/setup.c
index 7f263457122f..826fa3d7669c 100644
--- a/arch/sh/boards/systemh/setup.c
+++ b/arch/sh/boards/renesas/systemh/setup.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * linux/arch/sh/boards/systemh/setup.c
  *
  * Copyright (C) 2000  Kazumoto Kojima
diff --git a/arch/sh/boards/se/7300/Makefile b/arch/sh/boards/se/7300/Makefile
new file mode 100644
index 000000000000..0fbd4f47815c
--- /dev/null
+++ b/arch/sh/boards/se/7300/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile for the 7300 SolutionEngine specific parts of the kernel
+#
+
+obj-y	 := setup.o io.o irq.o
+
+obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/7300/io.c b/arch/sh/boards/se/7300/io.c
new file mode 100644
index 000000000000..4e8939197e20
--- /dev/null
+++ b/arch/sh/boards/se/7300/io.c
@@ -0,0 +1,261 @@
+/*
+ * linux/arch/sh/boards/se/7300/io.c
+ *
+ * Copyright (C) 2003 YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <asm/se7300/se7300.h>
+#include <asm/io.h>
+
+#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
+
+struct iop {
+	unsigned long start, end;
+	unsigned long base;
+	struct iop *(*check) (struct iop * p, unsigned long port);
+	unsigned char (*inb) (struct iop * p, unsigned long port);
+	unsigned short (*inw) (struct iop * p, unsigned long port);
+	void (*outb) (struct iop * p, unsigned char value, unsigned long port);
+	void (*outw) (struct iop * p, unsigned short value, unsigned long port);
+};
+
+struct iop *
+simple_check(struct iop *p, unsigned long port)
+{
+	if ((p->start <= port) && (port <= p->end))
+		return p;
+	else
+		badio(check, port);
+}
+
+struct iop *
+ide_check(struct iop *p, unsigned long port)
+{
+	if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
+		return p;
+	return NULL;
+}
+
+unsigned char
+simple_inb(struct iop *p, unsigned long port)
+{
+	return *(unsigned char *) (p->base + port);
+}
+
+unsigned short
+simple_inw(struct iop *p, unsigned long port)
+{
+	return *(unsigned short *) (p->base + port);
+}
+
+void
+simple_outb(struct iop *p, unsigned char value, unsigned long port)
+{
+	*(unsigned char *) (p->base + port) = value;
+}
+
+void
+simple_outw(struct iop *p, unsigned short value, unsigned long port)
+{
+	*(unsigned short *) (p->base + port) = value;
+}
+
+unsigned char
+pcc_inb(struct iop *p, unsigned long port)
+{
+	unsigned long addr = p->base + port + 0x40000;
+	unsigned long v;
+
+	if (port & 1)
+		addr += 0x00400000;
+	v = *(volatile unsigned char *) addr;
+	return v;
+}
+
+void
+pcc_outb(struct iop *p, unsigned char value, unsigned long port)
+{
+	unsigned long addr = p->base + port + 0x40000;
+
+	if (port & 1)
+		addr += 0x00400000;
+	*(volatile unsigned char *) addr = value;
+}
+
+unsigned char
+bad_inb(struct iop *p, unsigned long port)
+{
+	badio(inb, port);
+}
+
+void
+bad_outb(struct iop *p, unsigned char value, unsigned long port)
+{
+	badio(inw, port);
+}
+
+/* MSTLANEX01 LAN at 0xb400:0000 */
+static struct iop laniop = {
+	.start = 0x300,
+	.end = 0x30f,
+	.base = 0xb4000000,
+	.check = simple_check,
+	.inb = simple_inb,
+	.inw = simple_inw,
+	.outb = simple_outb,
+	.outw = simple_outw,
+};
+
+/* NE2000 pc card NIC */
+static struct iop neiop = {
+	.start = 0x280,
+	.end = 0x29f,
+	.base = 0xb0600000 + 0x80,	/* soft 0x280 -> hard 0x300 */
+	.check = simple_check,
+	.inb = pcc_inb,
+	.inw = simple_inw,
+	.outb = pcc_outb,
+	.outw = simple_outw,
+};
+
+/* CF in CF slot */
+static struct iop cfiop = {
+	.base = 0xb0600000,
+	.check = ide_check,
+	.inb = pcc_inb,
+	.inw = simple_inw,
+	.outb = pcc_outb,
+	.outw = simple_outw,
+};
+
+static __inline__ struct iop *
+port2iop(unsigned long port)
+{
+	if (0) ;
+#if defined(CONFIG_SMC91111)
+	else if (laniop.check(&laniop, port))
+		return &laniop;
+#endif
+#if defined(CONFIG_NE2000)
+	else if (neiop.check(&neiop, port))
+		return &neiop;
+#endif
+#if defined(CONFIG_IDE)
+	else if (cfiop.check(&cfiop, port))
+		return &cfiop;
+#endif
+	else
+		return &neiop;	/* fallback */
+}
+
+static inline void
+delay(void)
+{
+	ctrl_inw(0xac000000);
+	ctrl_inw(0xac000000);
+}
+
+unsigned char
+sh7300se_inb(unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	return (p->inb) (p, port);
+}
+
+unsigned char
+sh7300se_inb_p(unsigned long port)
+{
+	unsigned char v = sh7300se_inb(port);
+	delay();
+	return v;
+}
+
+unsigned short
+sh7300se_inw(unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	return (p->inw) (p, port);
+}
+
+unsigned int
+sh7300se_inl(unsigned long port)
+{
+	badio(inl, port);
+}
+
+void
+sh7300se_outb(unsigned char value, unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	(p->outb) (p, value, port);
+}
+
+void
+sh7300se_outb_p(unsigned char value, unsigned long port)
+{
+	sh7300se_outb(value, port);
+	delay();
+}
+
+void
+sh7300se_outw(unsigned short value, unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	(p->outw) (p, value, port);
+}
+
+void
+sh7300se_outl(unsigned int value, unsigned long port)
+{
+	badio(outl, port);
+}
+
+void
+sh7300se_insb(unsigned long port, void *addr, unsigned long count)
+{
+	unsigned char *a = addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		*a++ = (p->inb) (p, port);
+}
+
+void
+sh7300se_insw(unsigned long port, void *addr, unsigned long count)
+{
+	unsigned short *a = addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		*a++ = (p->inw) (p, port);
+}
+
+void
+sh7300se_insl(unsigned long port, void *addr, unsigned long count)
+{
+	badio(insl, port);
+}
+
+void
+sh7300se_outsb(unsigned long port, const void *addr, unsigned long count)
+{
+	unsigned char *a = (unsigned char *) addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		(p->outb) (p, *a++, port);
+}
+
+void
+sh7300se_outsw(unsigned long port, const void *addr, unsigned long count)
+{
+	unsigned short *a = (unsigned short *) addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		(p->outw) (p, *a++, port);
+}
+
+void
+sh7300se_outsl(unsigned long port, const void *addr, unsigned long count)
+{
+	badio(outsw, port);
+}
diff --git a/arch/sh/boards/se/7300/irq.c b/arch/sh/boards/se/7300/irq.c
new file mode 100644
index 000000000000..96c8c23d6c93
--- /dev/null
+++ b/arch/sh/boards/se/7300/irq.c
@@ -0,0 +1,37 @@
+/*
+ * linux/arch/sh/boards/se/7300/irq.c
+ *
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
+ *
+ * SH-Mobile SolutionEngine 7300 Support.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/mach/se7300.h>
+
+/*
+ * Initialize IRQ setting
+ */
+void __init
+init_7300se_IRQ(void)
+{
+	ctrl_outw(0x0028, PA_EPLD_MODESET);	/* mode set IRQ0,1 active low. */
+	ctrl_outw(0xa000, INTC_ICR1);	        /* IRQ mode; IRQ0,1 enable.    */
+	ctrl_outw(0x0000, PORT_PFCR);	        /* use F for IRQ[3:0] and SIU. */
+
+	/* PC_IRQ[0-3] -> IRQ0 (32) */
+	make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, 0x0f - IRQ0_IRQ);
+	/* A_IRQ[0-3] -> IRQ1 (33) */
+	make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, 0x0f - IRQ1_IRQ);
+	make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
+	make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
+	make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
+	make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
+
+	ctrl_outw(0x2000, PA_MRSHPC + 0x0c);	/* mrshpc irq enable */
+}
diff --git a/arch/sh/boards/se/7300/led.c b/arch/sh/boards/se/7300/led.c
new file mode 100644
index 000000000000..02c7f846c84c
--- /dev/null
+++ b/arch/sh/boards/se/7300/led.c
@@ -0,0 +1,69 @@
+/*
+ * linux/arch/sh/boards/se/7300/led.c
+ *
+ * Derived from linux/arch/sh/boards/se/770x/led.c
+ *
+ * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * This file contains Solution Engine specific LED code.
+ */
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <asm/mach/se7300.h>
+
+static void
+mach_led(int position, int value)
+{
+	volatile unsigned short *p = (volatile unsigned short *) PA_LED;
+
+	if (value) {
+		*p |= (1 << 8);
+	} else {
+		*p &= ~(1 << 8);
+	}
+}
+
+
+/* Cycle the LED's in the clasic Knightrider/Sun pattern */
+void
+heartbeat_7300se(void)
+{
+	static unsigned int cnt = 0, period = 0;
+	volatile unsigned short *p = (volatile unsigned short *) PA_LED;
+	static unsigned bit = 0, up = 1;
+
+	cnt += 1;
+	if (cnt < period) {
+		return;
+	}
+
+	cnt = 0;
+
+	/* Go through the points (roughly!):
+	 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
+	 */
+	period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
+
+	if (up) {
+		if (bit == 7) {
+			bit--;
+			up = 0;
+		} else {
+			bit++;
+		}
+	} else {
+		if (bit == 0) {
+			bit++;
+			up = 1;
+		} else {
+			bit--;
+		}
+	}
+	*p = 1 << (bit + 8);
+
+}
+
diff --git a/arch/sh/boards/se/7300/setup.c b/arch/sh/boards/se/7300/setup.c
new file mode 100644
index 000000000000..08536bc224dc
--- /dev/null
+++ b/arch/sh/boards/se/7300/setup.c
@@ -0,0 +1,66 @@
+/*
+ * linux/arch/sh/boards/se/7300/setup.c
+ *
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
+ *
+ * SH-Mobile SolutionEngine 7300 Support.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <asm/machvec.h>
+#include <asm/machvec_init.h>
+#include <asm/mach/io.h>
+
+void heartbeat_7300se(void);
+void init_7300se_IRQ(void);
+
+const char *
+get_system_type(void)
+{
+	return "SolutionEngine 7300";
+}
+
+/*
+ * The Machine Vector
+ */
+
+struct sh_machine_vector mv_7300se __initmv = {
+	.mv_nr_irqs = 109,
+	.mv_inb = sh7300se_inb,
+	.mv_inw = sh7300se_inw,
+	.mv_inl = sh7300se_inl,
+	.mv_outb = sh7300se_outb,
+	.mv_outw = sh7300se_outw,
+	.mv_outl = sh7300se_outl,
+
+	.mv_inb_p = sh7300se_inb_p,
+	.mv_inw_p = sh7300se_inw,
+	.mv_inl_p = sh7300se_inl,
+	.mv_outb_p = sh7300se_outb_p,
+	.mv_outw_p = sh7300se_outw,
+	.mv_outl_p = sh7300se_outl,
+
+	.mv_insb = sh7300se_insb,
+	.mv_insw = sh7300se_insw,
+	.mv_insl = sh7300se_insl,
+	.mv_outsb = sh7300se_outsb,
+	.mv_outsw = sh7300se_outsw,
+	.mv_outsl = sh7300se_outsl,
+
+	.mv_init_irq = init_7300se_IRQ,
+#ifdef CONFIG_HEARTBEAT
+	.mv_heartbeat = heartbeat_7300se,
+#endif
+};
+
+ALIAS_MV(7300se)
+/*
+ * Initialize the board
+ */
+void __init
+platform_setup(void)
+{
+
+}
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile
index 04489a938105..05ca14dfafb8 100644
--- a/arch/sh/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile
@@ -15,7 +15,11 @@ endif
 
 #
 # IMAGE_OFFSET is the load offset of the compression loader
+# Assign dummy values if these 2 variables are not defined,
+# in order to suppress error message.
 #
+CONFIG_MEMORY_START     ?= 0x0c000000
+CONFIG_BOOT_LINK_OFFSET ?= 0x00800000
 IMAGE_OFFSET := $(shell printf "0x%8x" $$[0x80000000+$(CONFIG_MEMORY_START)+$(CONFIG_BOOT_LINK_OFFSET)])
 
 LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds.s
diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c
index 1ed7425a4467..211e9110074f 100644
--- a/arch/sh/boot/compressed/misc.c
+++ b/arch/sh/boot/compressed/misc.c
@@ -1,7 +1,7 @@
 /*
  * arch/sh/boot/compressed/misc.c
- * 
- * This is a collection of several routines from gzip-1.0.3 
+ *
+ * This is a collection of several routines from gzip-1.0.3
  * adapted for Linux.
  *
  * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
@@ -52,7 +52,7 @@ static unsigned outcnt = 0;  /* bytes in output buffer */
 #define RESERVED     0xC0 /* bit 6,7:   reserved */
 
 #define get_byte()  (inptr < insize ? inbuf[inptr++] : fill_inbuf())
-		
+
 /* Diagnostic functions */
 #ifdef DEBUG
 #  define Assert(cond,msg) {if(!(cond)) error(msg);}
@@ -75,7 +75,7 @@ static void flush_window(void);
 static void error(char *m);
 static void gzip_mark(void **);
 static void gzip_release(void **);
-  
+
 extern char input_data[];
 extern int input_len;
 
@@ -83,20 +83,19 @@ static long bytes_out = 0;
 static uch *output_data;
 static unsigned long output_ptr = 0;
 
- 
 static void *malloc(int size);
 static void free(void *where);
 static void error(char *m);
 static void gzip_mark(void **);
 static void gzip_release(void **);
- 
-static void puts(const char *);
-  
+
+int puts(const char *);
+
 extern int _text;		/* Defined in vmlinux.lds.S */
 extern int _end;
 static unsigned long free_mem_ptr;
 static unsigned long free_mem_end_ptr;
- 
+
 #define HEAP_SIZE             0x10000
 
 #include "../../../../lib/inflate.c"
@@ -134,7 +133,7 @@ static void gzip_release(void **ptr)
 }
 
 #ifdef CONFIG_SH_STANDARD_BIOS
-static int strlen(const char *s)
+size_t strlen(const char *s)
 {
 	int i = 0;
 
@@ -143,14 +142,17 @@ static int strlen(const char *s)
 	return i;
 }
 
-void puts(const char *s)
+int puts(const char *s)
 {
-	sh_bios_console_write(s, strlen(s));
+	int len = strlen(s);
+	sh_bios_console_write(s, len);
+	return len;
 }
 #else
-void puts(const char *s)
+int puts(const char *s)
 {
-  /* This should be updated to use the sh-sci routines */
+	/* This should be updated to use the sh-sci routines */
+	return 0;
 }
 #endif
 
@@ -198,9 +200,9 @@ static void flush_window(void)
     ulg c = crc;         /* temporary variable */
     unsigned n;
     uch *in, *out, ch;
-    
+
     in = window;
-    out = &output_data[output_ptr]; 
+    out = &output_data[output_ptr];
     for (n = 0; n < outcnt; n++) {
 	    ch = *out++ = *in++;
 	    c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
diff --git a/arch/sh/cchips/Kconfig b/arch/sh/cchips/Kconfig
index 8a11af1ba3f8..155d139884c3 100644
--- a/arch/sh/cchips/Kconfig
+++ b/arch/sh/cchips/Kconfig
@@ -1,5 +1,18 @@
 menu "Companion Chips"
 
+config VOYAGERGX
+	bool "VoyagerGX chip support"
+	depends on SH_RTS7751R2D
+	help
+	  Selecting this option will support Silicon Motion, Inc. SM501.
+	  Designed to complement needs for the embedded industry, it
+	  provides video and 2D capability. To reduce system cost a
+	  wide variety of include I/O is supported, including analog RGB
+	  and digital LCD Panel interface, 8-bit parallel interface, USB,
+	  UART, IrDA, Zoom Video, AC97 or I2S, SSP, PWM, and I2C. There
+	  are additional GPIO bits that can be used to interface to
+	  external as well.
+
 # A board must have defined HD6446X_SERIES in order to see these
 config HD6446X_SERIES
 	bool "HD6446x support"
diff --git a/arch/sh/cchips/hd6446x/hd64461/setup.c b/arch/sh/cchips/hd6446x/hd64461/setup.c
index 5e03ea93838e..f014b9bf6922 100644
--- a/arch/sh/cchips/hd6446x/hd64461/setup.c
+++ b/arch/sh/cchips/hd6446x/hd64461/setup.c
@@ -134,7 +134,7 @@ int hd64461_irq_demux(int irq)
 	return __irq_demux(irq);
 }
 
-static struct irqaction irq0 = { hd64461_interrupt, SA_INTERRUPT, 0, "HD64461", NULL, NULL };
+static struct irqaction irq0 = { hd64461_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "HD64461", NULL, NULL };
 
 int __init setup_hd64461(void)
 {
diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c
index 73a44a7701bb..68e4c4e4283d 100644
--- a/arch/sh/cchips/hd6446x/hd64465/setup.c
+++ b/arch/sh/cchips/hd6446x/hd64465/setup.c
@@ -154,7 +154,7 @@ int hd64465_irq_demux(int irq)
 	return irq;
 }
 
-static struct irqaction irq0  = { hd64465_interrupt, SA_INTERRUPT, 0, "HD64465", NULL, NULL};
+static struct irqaction irq0  = { hd64465_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "HD64465", NULL, NULL};
 
 
 static int __init setup_hd64465(void)
diff --git a/arch/sh/cchips/voyagergx/Makefile b/arch/sh/cchips/voyagergx/Makefile
new file mode 100644
index 000000000000..085de72fd327
--- /dev/null
+++ b/arch/sh/cchips/voyagergx/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for VoyagerGX
+#
+
+obj-y	:= irq.o setup.o
+
+obj-$(CONFIG_USB_OHCI_HCD)	+= consistent.o
+
diff --git a/arch/sh/cchips/voyagergx/consistent.c b/arch/sh/cchips/voyagergx/consistent.c
new file mode 100644
index 000000000000..95a309d149b7
--- /dev/null
+++ b/arch/sh/cchips/voyagergx/consistent.c
@@ -0,0 +1,126 @@
+/*
+ * arch/sh/cchips/voyagergx/consistent.c
+ *
+ * Copyright (C) 2004  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/mm.h>
+#include <linux/dma-mapping.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <asm/io.h>
+#include <asm/bus-sh.h>
+
+struct voya_alloc_entry {
+	struct list_head list;
+	unsigned long ofs;
+	unsigned long len;
+};
+
+static spinlock_t voya_list_lock = SPIN_LOCK_UNLOCKED;
+static LIST_HEAD(voya_alloc_list);
+
+#define OHCI_SRAM_START	0xb0000000
+#define OHCI_HCCA_SIZE	0x100
+#define OHCI_SRAM_SIZE	0x10000
+
+void *voyagergx_consistent_alloc(struct device *dev, size_t size,
+				 dma_addr_t *handle, int flag)
+{
+	struct list_head *list = &voya_alloc_list;
+	struct voya_alloc_entry *entry;
+	struct sh_dev *shdev = to_sh_dev(dev);
+	unsigned long start, end;
+	unsigned long flags;
+
+	/*
+	 * The SM501 contains an integrated 8051 with its own SRAM.
+	 * Devices within the cchip can all hook into the 8051 SRAM.
+	 * We presently use this for the OHCI.
+	 *
+	 * Everything else goes through consistent_alloc().
+	 */
+	if (!dev || dev->bus != &sh_bus_types[SH_BUS_VIRT] ||
+		   (dev->bus == &sh_bus_types[SH_BUS_VIRT] &&
+		    shdev->dev_id != SH_DEV_ID_USB_OHCI))
+		return consistent_alloc(flag, size, handle);
+
+	start = OHCI_SRAM_START + OHCI_HCCA_SIZE;
+
+	entry = kmalloc(sizeof(struct voya_alloc_entry), GFP_ATOMIC);
+	if (!entry)
+		return NULL;
+
+	entry->len = (size + 15) & ~15;
+
+	/*
+	 * The basis for this allocator is dwmw2's malloc.. the
+	 * Matrox allocator :-)
+	 */
+	spin_lock_irqsave(&voya_list_lock, flags);
+	list_for_each(list, &voya_alloc_list) {
+		struct voya_alloc_entry *p;
+
+		p = list_entry(list, struct voya_alloc_entry, list);
+
+		if (p->ofs - start >= size)
+			goto out;
+
+		start = p->ofs + p->len;
+	}
+
+	end  = start + (OHCI_SRAM_SIZE  - OHCI_HCCA_SIZE);
+	list = &voya_alloc_list;
+
+	if (end - start >= size) {
+out:
+		entry->ofs = start;
+		list_add_tail(&entry->list, list);
+		spin_unlock_irqrestore(&voya_list_lock, flags);
+
+		*handle = start;
+		return (void *)start;
+	}
+
+	kfree(entry);
+	spin_unlock_irqrestore(&voya_list_lock, flags);
+
+	return NULL;
+}
+
+void voyagergx_consistent_free(struct device *dev, size_t size,
+			       void *vaddr, dma_addr_t handle)
+{
+	struct voya_alloc_entry *entry;
+	struct sh_dev *shdev = to_sh_dev(dev);
+	unsigned long flags;
+
+	if (!dev || dev->bus != &sh_bus_types[SH_BUS_VIRT] ||
+		   (dev->bus == &sh_bus_types[SH_BUS_VIRT] &&
+		    shdev->dev_id != SH_DEV_ID_USB_OHCI)) {
+		consistent_free(vaddr, size);
+		return;
+	}
+
+	spin_lock_irqsave(&voya_list_lock, flags);
+	list_for_each_entry(entry, &voya_alloc_list, list) {
+		if (entry->ofs != handle)
+			continue;
+
+		list_del(&entry->list);
+		kfree(entry);
+
+		break;
+	}
+	spin_unlock_irqrestore(&voya_list_lock, flags);
+}
+
+EXPORT_SYMBOL(voyagergx_consistent_alloc);
+EXPORT_SYMBOL(voyagergx_consistent_free);
+
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c
new file mode 100644
index 000000000000..3079234cb65b
--- /dev/null
+++ b/arch/sh/cchips/voyagergx/irq.c
@@ -0,0 +1,194 @@
+/* -------------------------------------------------------------------- */
+/* setup_voyagergx.c:                                                     */
+/* -------------------------------------------------------------------- */
+/*  This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+    Copyright 2003 (c) Lineo uSolutions,Inc.
+*/
+/* -------------------------------------------------------------------- */
+
+#undef DEBUG
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/rts7751r2d/rts7751r2d.h>
+#include <asm/rts7751r2d/voyagergx_reg.h>
+
+static void disable_voyagergx_irq(unsigned int irq)
+{
+	unsigned long flags, val;
+	unsigned long  mask = 1 << (irq - VOYAGER_IRQ_BASE);
+
+    	pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
+	local_irq_save(flags);
+        val = inl(VOYAGER_INT_MASK);
+        val &= ~mask;
+        outl(val, VOYAGER_INT_MASK);
+	local_irq_restore(flags);
+}
+
+
+static void enable_voyagergx_irq(unsigned int irq)
+{
+        unsigned long flags, val;
+        unsigned long  mask = 1 << (irq - VOYAGER_IRQ_BASE);
+
+        pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
+        local_irq_save(flags);
+        val = inl(VOYAGER_INT_MASK);
+        val |= mask;
+        outl(val, VOYAGER_INT_MASK);
+        local_irq_restore(flags);
+}
+
+
+static void mask_and_ack_voyagergx(unsigned int irq)
+{
+	disable_voyagergx_irq(irq);
+}
+
+static void end_voyagergx_irq(unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_voyagergx_irq(irq);
+}
+
+static unsigned int startup_voyagergx_irq(unsigned int irq)
+{
+	enable_voyagergx_irq(irq);
+	return 0;
+}
+
+static void shutdown_voyagergx_irq(unsigned int irq)
+{
+	disable_voyagergx_irq(irq);
+}
+
+static struct hw_interrupt_type voyagergx_irq_type = {
+	"VOYAGERGX-IRQ",
+	startup_voyagergx_irq,
+	shutdown_voyagergx_irq,
+	enable_voyagergx_irq,
+	disable_voyagergx_irq,
+	mask_and_ack_voyagergx,
+	end_voyagergx_irq,
+};
+
+static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+	printk(KERN_INFO
+	       "VoyagerGX: spurious interrupt, status: 0x%x\n",
+	       		inl(INT_STATUS));
+	return IRQ_HANDLED;
+}
+
+
+/*====================================================*/
+
+static struct {
+	int (*func)(int, void *);
+	void *dev;
+} voyagergx_demux[VOYAGER_IRQ_NUM];
+
+void voyagergx_register_irq_demux(int irq,
+		int (*demux)(int irq, void *dev), void *dev)
+{
+    	voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = demux;
+    	voyagergx_demux[irq - VOYAGER_IRQ_BASE].dev = dev;
+}
+
+void voyagergx_unregister_irq_demux(int irq)
+{
+    	voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = 0;
+}
+
+int voyagergx_irq_demux(int irq)
+{
+
+	if (irq == IRQ_VOYAGER ) {
+		unsigned long i = 0, bit __attribute__ ((unused));
+		unsigned long val  = inl(INT_STATUS);
+#if 1
+		if ( val & ( 1 << 1 )){
+			i = 1;
+		} else if ( val & ( 1 << 2 )){
+			i = 2;
+		} else if ( val & ( 1 << 6 )){
+			i = 6;
+		} else if( val & ( 1 << 10 )){
+			i = 10;
+		} else if( val & ( 1 << 11 )){
+			i = 11;
+		} else if( val & ( 1 << 12 )){
+			i = 12;
+		} else if( val & ( 1 << 17 )){
+			i = 17;
+		} else {
+			printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val);
+		}
+		pr_debug("voyagergx_irq_demux %d \n", i);
+#else
+		for (bit = 1, i = 0 ; i < VOYAGER_IRQ_NUM ; bit <<= 1, i++)
+			if (val & bit)
+				break;
+#endif
+    	    	if (i < VOYAGER_IRQ_NUM) {
+			irq = VOYAGER_IRQ_BASE + i;
+    	    		if (voyagergx_demux[i].func != 0)
+				irq = voyagergx_demux[i].func(irq, voyagergx_demux[i].dev);
+		}
+	}
+	return irq;
+}
+
+static struct irqaction irq0  = { voyagergx_interrupt, SA_INTERRUPT, 0, "VOYAGERGX", NULL, NULL};
+
+void __init setup_voyagergx_irq(void)
+{
+	int i, flag;
+
+	printk(KERN_INFO "VoyagerGX configured at 0x%x on irq %d(mapped into %d to %d)\n",
+	       VOYAGER_BASE,
+	       IRQ_VOYAGER,
+	       VOYAGER_IRQ_BASE,
+	       VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1);
+
+	for (i=0; i<VOYAGER_IRQ_NUM; i++) {
+		flag = 0;
+		switch (VOYAGER_IRQ_BASE + i) {
+		case VOYAGER_USBH_IRQ:
+		case VOYAGER_8051_IRQ:
+		case VOYAGER_UART0_IRQ:
+		case VOYAGER_UART1_IRQ:
+		case VOYAGER_AC97_IRQ:
+			flag = 1;
+		}
+		if (flag == 1)
+			irq_desc[VOYAGER_IRQ_BASE + i].handler = &voyagergx_irq_type;
+	}
+
+	setup_irq(IRQ_VOYAGER, &irq0);
+}
+
diff --git a/arch/sh/cchips/voyagergx/setup.c b/arch/sh/cchips/voyagergx/setup.c
new file mode 100644
index 000000000000..139ca88ac9e6
--- /dev/null
+++ b/arch/sh/cchips/voyagergx/setup.c
@@ -0,0 +1,37 @@
+/*
+ * arch/sh/cchips/voyagergx/setup.c
+ *
+ * Setup routines for VoyagerGX cchip.
+ *
+ * Copyright (C) 2003 Lineo uSolutions, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <asm/io.h>
+#include <asm/rts7751r2d/voyagergx_reg.h>
+
+static int __init setup_voyagergx(void)
+{
+	unsigned long val;
+
+	val = inl(DRAM_CTRL);
+	val |= (DRAM_CTRL_CPU_COLUMN_SIZE_256	|
+		DRAM_CTRL_CPU_ACTIVE_PRECHARGE	|
+		DRAM_CTRL_CPU_RESET		|
+		DRAM_CTRL_REFRESH_COMMAND	|
+		DRAM_CTRL_BLOCK_WRITE_TIME	|
+		DRAM_CTRL_BLOCK_WRITE_PRECHARGE	|
+		DRAM_CTRL_ACTIVE_PRECHARGE	|
+		DRAM_CTRL_RESET			|
+		DRAM_CTRL_REMAIN_ACTIVE);
+	outl(val, DRAM_CTRL);
+
+	return 0;
+}
+
+module_init(setup_voyagergx);
diff --git a/arch/sh/configs/rts7751r2d_defconfig b/arch/sh/configs/rts7751r2d_defconfig
new file mode 100644
index 000000000000..f9e1f7c5a657
--- /dev/null
+++ b/arch/sh/configs/rts7751r2d_defconfig
@@ -0,0 +1,809 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_SUPERH=y
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODULE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_KMOD is not set
+
+#
+# System type
+#
+# CONFIG_SH_SOLUTION_ENGINE is not set
+# CONFIG_SH_7751_SOLUTION_ENGINE is not set
+# CONFIG_SH_7751_SYSTEMH is not set
+# CONFIG_SH_STB1_HARP is not set
+# CONFIG_SH_STB1_OVERDRIVE is not set
+# CONFIG_SH_HP620 is not set
+# CONFIG_SH_HP680 is not set
+# CONFIG_SH_HP690 is not set
+# CONFIG_SH_CQREEK is not set
+# CONFIG_SH_DMIDA is not set
+# CONFIG_SH_EC3104 is not set
+# CONFIG_SH_SATURN is not set
+# CONFIG_SH_DREAMCAST is not set
+# CONFIG_SH_CAT68701 is not set
+# CONFIG_SH_BIGSUR is not set
+# CONFIG_SH_SH2000 is not set
+# CONFIG_SH_ADX is not set
+# CONFIG_SH_MPC1211 is not set
+# CONFIG_SH_SECUREEDGE5410 is not set
+CONFIG_SH_RTS7751R2D=y
+# CONFIG_SH_UNKNOWN is not set
+# CONFIG_CPU_SH2 is not set
+# CONFIG_CPU_SH3 is not set
+CONFIG_CPU_SH4=y
+# CONFIG_CPU_SUBTYPE_SH7604 is not set
+# CONFIG_CPU_SUBTYPE_SH7300 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+CONFIG_CPU_SUBTYPE_SH7751=y
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
+CONFIG_MMU=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="mem=64M console=ttySC0,115200 root=/dev/hda1"
+CONFIG_MEMORY_START=0x0c000000
+CONFIG_MEMORY_SIZE=0x04000000
+CONFIG_MEMORY_SET=y
+# CONFIG_MEMORY_OVERRIDE is not set
+CONFIG_SH_RTC=y
+CONFIG_ZERO_PAGE_OFFSET=0x00010000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_PREEMPT is not set
+# CONFIG_UBC_WAKEUP is not set
+# CONFIG_SH_WRITETHROUGH is not set
+# CONFIG_SH_OCRAM is not set
+# CONFIG_SH_STORE_QUEUES is not set
+# CONFIG_SMP is not set
+CONFIG_VOYAGERGX=y
+CONFIG_RTS7751R2D_REV11=y
+CONFIG_SH_PCLK_FREQ=60000000
+# CONFIG_CPU_FREQ is not set
+CONFIG_SH_DMA=y
+CONFIG_NR_ONCHIP_DMA_CHANNELS=8
+# CONFIG_NR_DMA_CHANNELS_BOOL is not set
+# CONFIG_DMA_PAGE_OPS is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
+#
+CONFIG_ISA=y
+CONFIG_PCI=y
+CONFIG_SH_PCIDMA_NONCOHERENT=y
+CONFIG_PCI_AUTO=y
+CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
+CONFIG_PCI_DMA=y
+# CONFIG_PCI_LEGACY_PROC is not set
+CONFIG_PCI_NAMES=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+CONFIG_YENTA=m
+CONFIG_CARDBUS=y
+# CONFIG_I82092 is not set
+# CONFIG_I82365 is not set
+# CONFIG_TCIC is not set
+CONFIG_PCMCIA_PROBE=y
+
+#
+# PCI Hotplug Support
+#
+CONFIG_HOTPLUG_PCI=y
+# CONFIG_HOTPLUG_PCI_FAKE is not set
+# CONFIG_HOTPLUG_PCI_CPCI is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_FLAT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+CONFIG_BLK_DEV_IDECS=m
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+# CONFIG_IDE_TASKFILE_IO is not set
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_BLK_DEV_IDEPCI is not set
+# CONFIG_IDE_CHIPSETS is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+# CONFIG_NETLINK_DEV is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_STNIC is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_AT1700 is not set
+# CONFIG_DEPCA is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_ISA=y
+# CONFIG_E2100 is not set
+# CONFIG_EWRK3 is not set
+# CONFIG_EEXPRESS is not set
+# CONFIG_EEXPRESS_PRO is not set
+# CONFIG_HPLAN_PLUS is not set
+# CONFIG_HPLAN is not set
+# CONFIG_LP486E is not set
+# CONFIG_ETH16I is not set
+CONFIG_NE2000=m
+# CONFIG_ZNET is not set
+# CONFIG_SEEQ8005 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_AC3200 is not set
+# CONFIG_APRICOT is not set
+# CONFIG_B44 is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_DGRS is not set
+# CONFIG_EEPRO100 is not set
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+CONFIG_8139TOO=y
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_8139_OLD_RX_RESET is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+CONFIG_NET_RADIO=y
+
+#
+# Obsolete Wireless cards support (pre-802.11)
+#
+# CONFIG_STRIP is not set
+# CONFIG_ARLAN is not set
+# CONFIG_WAVELAN is not set
+# CONFIG_PCMCIA_WAVELAN is not set
+# CONFIG_PCMCIA_NETWAVE is not set
+
+#
+# Wireless 802.11 Frequency Hopping cards support
+#
+# CONFIG_PCMCIA_RAYCS is not set
+
+#
+# Wireless 802.11b ISA/PCI cards support
+#
+# CONFIG_AIRO is not set
+CONFIG_HERMES=m
+# CONFIG_PLX_HERMES is not set
+# CONFIG_TMD_HERMES is not set
+# CONFIG_PCI_HERMES is not set
+
+#
+# Wireless 802.11b Pcmcia/Cardbus cards support
+#
+CONFIG_PCMCIA_HERMES=m
+# CONFIG_AIRO_CS is not set
+# CONFIG_PCMCIA_ATMEL is not set
+# CONFIG_PCMCIA_WL3501 is not set
+CONFIG_NET_WIRELESS=y
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+# CONFIG_NET_PCMCIA is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Userland interfaces
+#
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+# CONFIG_SERIO is not set
+# CONFIG_SERIO_I8042 is not set
+
+#
+# Input Device Drivers
+#
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL is not set
+CONFIG_SH_SCI=y
+CONFIG_SERIAL_CONSOLE=y
+CONFIG_RTC_9701JE=y
+
+#
+# Unix 98 PTY support
+#
+# CONFIG_UNIX98_PTYS is not set
+CONFIG_HEARTBEAT=y
+# CONFIG_PSMOUSE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_RTC is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_SH_SCI is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# I2C Algorithms
+#
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C Hardware Sensors Chip support
+#
+# CONFIG_I2C_SENSOR is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+CONFIG_MINIX_FS=y
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_EXPORTFS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=y
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=m
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_OSSEMUL is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# ISA devices
+#
+# CONFIG_SND_AD1848 is not set
+# CONFIG_SND_CS4231 is not set
+# CONFIG_SND_CS4232 is not set
+# CONFIG_SND_CS4236 is not set
+# CONFIG_SND_ES1688 is not set
+# CONFIG_SND_ES18XX is not set
+# CONFIG_SND_GUSCLASSIC is not set
+# CONFIG_SND_GUSEXTREME is not set
+# CONFIG_SND_GUSMAX is not set
+# CONFIG_SND_INTERWAVE is not set
+# CONFIG_SND_INTERWAVE_STB is not set
+# CONFIG_SND_OPTI92X_AD1848 is not set
+# CONFIG_SND_OPTI92X_CS4231 is not set
+# CONFIG_SND_OPTI93X is not set
+# CONFIG_SND_SB8 is not set
+# CONFIG_SND_SB16 is not set
+# CONFIG_SND_SBAWE is not set
+# CONFIG_SND_WAVEFRONT is not set
+# CONFIG_SND_CMI8330 is not set
+# CONFIG_SND_OPL3SA2 is not set
+# CONFIG_SND_SGALAXY is not set
+# CONFIG_SND_SSCAPE is not set
+
+#
+# PCI devices
+#
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_TRIDENT is not set
+CONFIG_SND_YMFPCI=m
+# CONFIG_SND_ALS4000 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VX222 is not set
+
+#
+# PCMCIA devices
+#
+# CONFIG_SND_VXPOCKET is not set
+# CONFIG_SND_VXP440 is not set
+
+#
+# Open Sound System
+#
+CONFIG_SOUND_PRIME=m
+# CONFIG_SOUND_BT878 is not set
+CONFIG_SOUND_CMPCI=m
+# CONFIG_SOUND_CMPCI_FM is not set
+# CONFIG_SOUND_CMPCI_MIDI is not set
+# CONFIG_SOUND_CMPCI_JOYSTICK is not set
+# CONFIG_SOUND_CMPCI_CM8738 is not set
+# CONFIG_SOUND_EMU10K1 is not set
+# CONFIG_SOUND_FUSION is not set
+# CONFIG_SOUND_CS4281 is not set
+# CONFIG_SOUND_ES1370 is not set
+# CONFIG_SOUND_ES1371 is not set
+# CONFIG_SOUND_ESSSOLO1 is not set
+# CONFIG_SOUND_MAESTRO is not set
+# CONFIG_SOUND_MAESTRO3 is not set
+# CONFIG_SOUND_ICH is not set
+# CONFIG_SOUND_SONICVIBES is not set
+# CONFIG_SOUND_TRIDENT is not set
+# CONFIG_SOUND_MSNDCLAS is not set
+# CONFIG_SOUND_MSNDPIN is not set
+# CONFIG_SOUND_VIA82CXXX is not set
+# CONFIG_SOUND_OSS is not set
+# CONFIG_SOUND_ALI5455 is not set
+# CONFIG_SOUND_FORTE is not set
+# CONFIG_SOUND_RME96XX is not set
+# CONFIG_SOUND_AD1980 is not set
+CONFIG_SOUND_VOYAGERGX=m
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_KGDB is not set
+# CONFIG_FRAME_POINTER is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
diff --git a/arch/sh/configs/se7300_defconfig b/arch/sh/configs/se7300_defconfig
new file mode 100644
index 000000000000..842ca47a684e
--- /dev/null
+++ b/arch/sh/configs/se7300_defconfig
@@ -0,0 +1,461 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_SUPERH=y
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+# CONFIG_SWAP is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_HOTPLUG is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# System type
+#
+# CONFIG_SH_SOLUTION_ENGINE is not set
+# CONFIG_SH_7751_SOLUTION_ENGINE is not set
+CONFIG_SH_7300_SOLUTION_ENGINE=y
+# CONFIG_SH_7751_SYSTEMH is not set
+# CONFIG_SH_STB1_HARP is not set
+# CONFIG_SH_STB1_OVERDRIVE is not set
+# CONFIG_SH_HP620 is not set
+# CONFIG_SH_HP680 is not set
+# CONFIG_SH_HP690 is not set
+# CONFIG_SH_CQREEK is not set
+# CONFIG_SH_DMIDA is not set
+# CONFIG_SH_EC3104 is not set
+# CONFIG_SH_SATURN is not set
+# CONFIG_SH_DREAMCAST is not set
+# CONFIG_SH_CAT68701 is not set
+# CONFIG_SH_BIGSUR is not set
+# CONFIG_SH_SH2000 is not set
+# CONFIG_SH_ADX is not set
+# CONFIG_SH_MPC1211 is not set
+# CONFIG_SH_SECUREEDGE5410 is not set
+# CONFIG_SH_HS7751RVOIP is not set
+# CONFIG_SH_RTS7751R2D is not set
+# CONFIG_SH_UNKNOWN is not set
+# CONFIG_CPU_SH2 is not set
+CONFIG_CPU_SH3=y
+# CONFIG_CPU_SH4 is not set
+# CONFIG_CPU_SUBTYPE_SH7604 is not set
+CONFIG_CPU_SUBTYPE_SH7300=y
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
+# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
+CONFIG_MMU=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttySC0,38400 root=/dev/ram0"
+CONFIG_MEMORY_START=0x0c000000
+CONFIG_MEMORY_SIZE=0x04000000
+# CONFIG_MEMORY_OVERRIDE is not set
+CONFIG_SH_DSP=y
+# CONFIG_SH_ADC is not set
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00210000
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_PREEMPT is not set
+# CONFIG_UBC_WAKEUP is not set
+# CONFIG_SH_WRITETHROUGH is not set
+# CONFIG_SH_OCRAM is not set
+# CONFIG_SMP is not set
+# CONFIG_SH_PCLK_CALC is not set
+CONFIG_SH_PCLK_FREQ=33333333
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+# CONFIG_HD6446X_SERIES is not set
+CONFIG_HEARTBEAT=y
+
+#
+# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
+#
+# CONFIG_PCI is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_FLAT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# SH initrd options
+#
+CONFIG_EMBEDDED_RAMDISK=y
+CONFIG_EMBEDDED_RAMDISK_IMAGE="ramdisk.gz"
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Networking support
+#
+# CONFIG_NET is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+CONFIG_IPMI_HANDLER=y
+# CONFIG_IPMI_PANIC_EVENT is not set
+CONFIG_IPMI_DEVICE_INTERFACE=y
+# CONFIG_IPMI_SI is not set
+CONFIG_IPMI_WATCHDOG=y
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+CONFIG_SOFT_WATCHDOG=y
+# CONFIG_SH_WDT is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+CONFIG_DEVFS_FS=y
+CONFIG_DEVFS_MOUNT=y
+# CONFIG_DEVFS_DEBUG is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_INFO is not set
+CONFIG_SH_STANDARD_BIOS=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_KGDB=y
+
+#
+# KGDB configuration options
+#
+# CONFIG_MORE_COMPILE_OPTIONS is not set
+# CONFIG_KGDB_NMI is not set
+# CONFIG_KGDB_THREAD is not set
+# CONFIG_SH_KGDB_CONSOLE is not set
+# CONFIG_KGDB_SYSRQ is not set
+# CONFIG_KGDB_KERNEL_ASSERTS is not set
+
+#
+# Serial port setup
+#
+CONFIG_KGDB_DEFPORT=1
+CONFIG_KGDB_DEFBAUD=115200
+CONFIG_KGDB_DEFPARITY_N=y
+# CONFIG_KGDB_DEFPARITY_E is not set
+# CONFIG_KGDB_DEFPARITY_O is not set
+CONFIG_KGDB_DEFBITS_8=y
+# CONFIG_KGDB_DEFBITS_7 is not set
+# CONFIG_FRAME_POINTER is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
diff --git a/arch/sh/defconfig b/arch/sh/defconfig
index 44ec26ea5505..ef852bbc926b 100644
--- a/arch/sh/defconfig
+++ b/arch/sh/defconfig
@@ -352,7 +352,7 @@ CONFIG_MSDOS_PARTITION=y
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 CONFIG_SH_STANDARD_BIOS=y
-CONFIG_SH_EARLY_PRINTK=y
+CONFIG_EARLY_PRINTK=y
 # CONFIG_KGDB is not set
 # CONFIG_FRAME_POINTER is not set
 
diff --git a/arch/sh/drivers/dma/Makefile b/arch/sh/drivers/dma/Makefile
index e8941854252c..065d4c90970e 100644
--- a/arch/sh/drivers/dma/Makefile
+++ b/arch/sh/drivers/dma/Makefile
@@ -3,6 +3,7 @@
 #
 
 obj-y				+= dma-api.o dma-isa.o
+obj-$(CONFIG_SYSFS)		+= dma-sysfs.o
 obj-$(CONFIG_SH_DMA)		+= dma-sh.o
 obj-$(CONFIG_SH_DREAMCAST)	+= dma-pvr2.o dma-g2.o
 
diff --git a/arch/sh/drivers/dma/dma-api.c b/arch/sh/drivers/dma/dma-api.c
index f8b352d4b091..3fc34e1cf7df 100644
--- a/arch/sh/drivers/dma/dma-api.c
+++ b/arch/sh/drivers/dma/dma-api.c
@@ -3,23 +3,24 @@
  *
  * SuperH-specific DMA management API
  *
- * Copyright (C) 2003  Paul Mundt
+ * Copyright (C) 2003, 2004  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
- */ 
+ */
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/spinlock.h>
 #include <linux/proc_fs.h>
+#include <linux/list.h>
 #include <asm/dma.h>
 
-struct dma_info dma_info[MAX_DMA_CHANNELS] = { { 0, } };
 spinlock_t dma_spin_lock = SPIN_LOCK_UNLOCKED;
+static LIST_HEAD(registered_dmac_list);
 
-/* 
+/*
  * A brief note about the reasons for this API as it stands.
  *
  * For starters, the old ISA DMA API didn't work for us for a number of
@@ -54,124 +55,213 @@ spinlock_t dma_spin_lock = SPIN_LOCK_UNLOCKED;
 
 struct dma_info *get_dma_info(unsigned int chan)
 {
-	return dma_info + chan;
+	struct list_head *pos, *tmp;
+	unsigned int total = 0;
+
+	/*
+	 * Look for each DMAC's range to determine who the owner of
+	 * the channel is.
+	 */
+	list_for_each_safe(pos, tmp, &registered_dmac_list) {
+		struct dma_info *info = list_entry(pos, struct dma_info, list);
+
+		total += info->nr_channels;
+		if (chan > total)
+			continue;
+
+		return info;
+	}
+
+	return NULL;
+}
+
+struct dma_channel *get_dma_channel(unsigned int chan)
+{
+	struct dma_info *info = get_dma_info(chan);
+
+	if (!info)
+		return ERR_PTR(-EINVAL);
+
+	return info->channels + chan;
 }
 
 int get_dma_residue(unsigned int chan)
 {
 	struct dma_info *info = get_dma_info(chan);
+	struct dma_channel *channel = &info->channels[chan];
 
 	if (info->ops->get_residue)
-		return info->ops->get_residue(info);
-	
+		return info->ops->get_residue(channel);
+
 	return 0;
 }
 
 int request_dma(unsigned int chan, const char *dev_id)
 {
 	struct dma_info *info = get_dma_info(chan);
+	struct dma_channel *channel = &info->channels[chan];
 
-	down(&info->sem);
+	down(&channel->sem);
 
 	if (!info->ops || chan >= MAX_DMA_CHANNELS) {
-		up(&info->sem);
+		up(&channel->sem);
 		return -EINVAL;
 	}
-	
-	atomic_set(&info->busy, 1);
 
-	info->dev_id = dev_id;
+	atomic_set(&channel->busy, 1);
 
-	up(&info->sem);
+	strlcpy(channel->dev_id, dev_id, sizeof(channel->dev_id));
+
+	up(&channel->sem);
 
 	if (info->ops->request)
-		return info->ops->request(info);
-	
+		return info->ops->request(channel);
+
 	return 0;
 }
 
 void free_dma(unsigned int chan)
 {
 	struct dma_info *info = get_dma_info(chan);
+	struct dma_channel *channel = &info->channels[chan];
 
 	if (info->ops->free)
-		info->ops->free(info);
-	
-	atomic_set(&info->busy, 0);
+		info->ops->free(channel);
+
+	atomic_set(&channel->busy, 0);
 }
 
 void dma_wait_for_completion(unsigned int chan)
 {
 	struct dma_info *info = get_dma_info(chan);
+	struct dma_channel *channel = &info->channels[chan];
 
-	if (info->tei_capable) {
-		wait_event(info->wait_queue, (info->ops->get_residue(info) == 0));
+	if (channel->flags & DMA_TEI_CAPABLE) {
+		wait_event(channel->wait_queue,
+			   (info->ops->get_residue(channel) == 0));
 		return;
 	}
 
-	while (info->ops->get_residue(info))
+	while (info->ops->get_residue(channel))
 		cpu_relax();
 }
 
 void dma_configure_channel(unsigned int chan, unsigned long flags)
 {
 	struct dma_info *info = get_dma_info(chan);
+	struct dma_channel *channel = &info->channels[chan];
 
 	if (info->ops->configure)
-		info->ops->configure(info, flags);
+		info->ops->configure(channel, flags);
 }
 
 int dma_xfer(unsigned int chan, unsigned long from,
 	     unsigned long to, size_t size, unsigned int mode)
 {
 	struct dma_info *info = get_dma_info(chan);
+	struct dma_channel *channel = &info->channels[chan];
 
-	info->sar	= from;
-	info->dar	= to;
-	info->count	= size;
-	info->mode	= mode;
+	channel->sar	= from;
+	channel->dar	= to;
+	channel->count	= size;
+	channel->mode	= mode;
 
-	return info->ops->xfer(info);
+	return info->ops->xfer(channel);
 }
 
 #ifdef CONFIG_PROC_FS
 static int dma_read_proc(char *buf, char **start, off_t off,
 			 int len, int *eof, void *data)
 {
-	struct dma_info *info;
+	struct list_head *pos, *tmp;
 	char *p = buf;
-	int i;
 
-	for (i = 0, info = dma_info; i < MAX_DMA_CHANNELS; i++, info++) {
-		if (!atomic_read(&info->busy))
-			continue;
+	if (list_empty(&registered_dmac_list))
+		return 0;
+
+	/*
+	 * Iterate over each registered DMAC
+	 */
+	list_for_each_safe(pos, tmp, &registered_dmac_list) {
+		struct dma_info *info = list_entry(pos, struct dma_info, list);
+		int i;
 
-		p += sprintf(p, "%2d: %14s    %s\n", i,
-			     info->ops->name, info->dev_id);
+		/*
+		 * Iterate over each channel
+		 */
+		for (i = 0; i < info->nr_channels; i++) {
+			struct dma_channel *channel = info->channels + i;
+
+			if (!(channel->flags & DMA_CONFIGURED))
+				continue;
+
+			p += sprintf(p, "%2d: %14s    %s\n", i,
+				     info->name, channel->dev_id);
+		}
 	}
 
 	return p - buf;
 }
 #endif
 
-int __init register_dmac(struct dma_ops *ops)
+
+int __init register_dmac(struct dma_info *info)
 {
 	int i;
 
-	printk("DMA: Registering %s handler.\n", ops->name);
+	INIT_LIST_HEAD(&info->list);
+
+	printk(KERN_INFO "DMA: Registering %s handler (%d channels).\n",
+	       info->name, info->nr_channels);
+
+	BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels);
 
-	for (i = 0; i < MAX_DMA_CHANNELS; i++) {
-		struct dma_info *info = get_dma_info(i);
+	/*
+	 * Don't touch pre-configured channels
+	 */
+	if (!(info->flags & DMAC_CHANNELS_CONFIGURED)) {
+		unsigned int size;
 
-		info->chan = i;
+		size = sizeof(struct dma_channel) * info->nr_channels;
 
-		init_MUTEX(&info->sem);
-		init_waitqueue_head(&info->wait_queue);
+		info->channels = kmalloc(size, GFP_KERNEL);
+		if (!info->channels)
+			return -ENOMEM;
+
+		memset(info->channels, 0, size);
 	}
 
+	for (i = 0; i < info->nr_channels; i++) {
+		struct dma_channel *chan = info->channels + i;
+
+		chan->chan = i;
+
+		memcpy(chan->dev_id, "Unused", 7);
+
+		if (info->flags & DMAC_CHANNELS_TEI_CAPABLE)
+			chan->flags |= DMA_TEI_CAPABLE;
+
+		init_MUTEX(&chan->sem);
+		init_waitqueue_head(&chan->wait_queue);
+
+#ifdef CONFIG_SYSFS
+		dma_create_sysfs_files(chan);
+#endif
+	}
+
+	list_add(&info->list, &registered_dmac_list);
+
 	return 0;
 }
 
+void __exit unregister_dmac(struct dma_info *info)
+{
+	if (!(info->flags & DMAC_CHANNELS_CONFIGURED))
+		kfree(info->channels);
+
+	list_del(&info->list);
+}
+
 static int __init dma_api_init(void)
 {
 	printk("DMA: Registering DMA API.\n");
@@ -191,8 +281,11 @@ MODULE_LICENSE("GPL");
 
 EXPORT_SYMBOL(request_dma);
 EXPORT_SYMBOL(free_dma);
+EXPORT_SYMBOL(register_dmac);
+EXPORT_SYMBOL(unregister_dmac);
 EXPORT_SYMBOL(get_dma_residue);
 EXPORT_SYMBOL(get_dma_info);
+EXPORT_SYMBOL(get_dma_channel);
 EXPORT_SYMBOL(dma_xfer);
 EXPORT_SYMBOL(dma_wait_for_completion);
 EXPORT_SYMBOL(dma_configure_channel);
diff --git a/arch/sh/drivers/dma/dma-isa.c b/arch/sh/drivers/dma/dma-isa.c
index 01564983b967..1c9bc45b8bcb 100644
--- a/arch/sh/drivers/dma/dma-isa.c
+++ b/arch/sh/drivers/dma/dma-isa.c
@@ -3,13 +3,14 @@
  *
  * Generic ISA DMA wrapper for SH DMA API
  *
- * Copyright (C) 2003  Paul Mundt
+ * Copyright (C) 2003, 2004  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
- */ 
+ */
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <asm/dma.h>
 
 /*
@@ -39,55 +40,67 @@ unsigned long __deprecated claim_dma_lock(void)
 
 	return flags;
 }
+EXPORT_SYMBOL(claim_dma_lock);
 
 void __deprecated release_dma_lock(unsigned long flags)
 {
 	spin_unlock_irqrestore(&dma_spin_lock, flags);
 }
+EXPORT_SYMBOL(release_dma_lock);
 
 void __deprecated disable_dma(unsigned int chan)
 {
 	/* Nothing */
 }
+EXPORT_SYMBOL(disable_dma);
 
 void __deprecated enable_dma(unsigned int chan)
 {
 	struct dma_info *info = get_dma_info(chan);
+	struct dma_channel *channel = &info->channels[chan];
 
-	info->ops->xfer(info);
+	info->ops->xfer(channel);
 }
+EXPORT_SYMBOL(enable_dma);
 
 void clear_dma_ff(unsigned int chan)
 {
 	/* Nothing */
 }
+EXPORT_SYMBOL(clear_dma_ff);
 
 void set_dma_mode(unsigned int chan, char mode)
 {
 	struct dma_info *info = get_dma_info(chan);
+	struct dma_channel *channel = &info->channels[chan];
 
-	info->mode = mode;
+	channel->mode = mode;
 }
+EXPORT_SYMBOL(set_dma_mode);
 
 void set_dma_addr(unsigned int chan, unsigned int addr)
 {
 	struct dma_info *info = get_dma_info(chan);
+	struct dma_channel *channel = &info->channels[chan];
 
 	/*
 	 * Single address mode is the only thing supported through
 	 * this interface.
 	 */
-	if ((info->mode & DMA_MODE_MASK) == DMA_MODE_READ) {
-		info->sar = addr;
+	if ((channel->mode & DMA_MODE_MASK) == DMA_MODE_READ) {
+		channel->sar = addr;
 	} else {
-		info->dar = addr;
+		channel->dar = addr;
 	}
 }
+EXPORT_SYMBOL(set_dma_addr);
 
 void set_dma_count(unsigned int chan, unsigned int count)
 {
 	struct dma_info *info = get_dma_info(chan);
+	struct dma_channel *channel = &info->channels[chan];
 
-	info->count = count;
+	channel->count = count;
 }
+EXPORT_SYMBOL(set_dma_count);
 
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index ec3ff5044744..31dacd4444b2 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -1,10 +1,10 @@
 /*
- * arch/sh/kernel/cpu/dma.c
+ * arch/sh/drivers/dma/dma-sh.c
  *
- * Copyright (C) 2000 Takashi YOSHII
- * Copyright (C) 2003 Paul Mundt
+ * SuperH On-chip DMAC Support
  *
- * PC like DMA API for SuperH's DMAC.
+ * Copyright (C) 2000 Takashi YOSHII
+ * Copyright (C) 2003, 2004 Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -29,43 +29,29 @@
  * Defaults to a 64-bit transfer size.
  */
 enum {
-	XMIT_SZ_64BIT	= 0,
-	XMIT_SZ_8BIT	= 1,
-	XMIT_SZ_16BIT	= 2,
-	XMIT_SZ_32BIT	= 3,
-	XMIT_SZ_256BIT	= 4,
+	XMIT_SZ_64BIT,
+	XMIT_SZ_8BIT,
+	XMIT_SZ_16BIT,
+	XMIT_SZ_32BIT,
+	XMIT_SZ_256BIT,
 };
 
 /*
  * The DMA count is defined as the number of bytes to transfer.
  */
 static unsigned int ts_shift[] = {
-	[XMIT_SZ_64BIT]		3,
-	[XMIT_SZ_8BIT]		0,
-	[XMIT_SZ_16BIT]		1,
-	[XMIT_SZ_32BIT]		2,
-	[XMIT_SZ_256BIT]	5,
-};
-
-struct sh_dmac_channel {
-        unsigned long sar;
-        unsigned long dar;
-        unsigned long dmatcr;
-        unsigned long chcr;
-} __attribute__ ((aligned(16)));
-
-struct sh_dmac_info {
-        struct sh_dmac_channel channel[4];
-        unsigned long dmaor;
+	[XMIT_SZ_64BIT]		= 3,
+	[XMIT_SZ_8BIT]		= 0,
+	[XMIT_SZ_16BIT]		= 1,
+	[XMIT_SZ_32BIT]		= 2,
+	[XMIT_SZ_256BIT]	= 5,
 };
 
-static volatile struct sh_dmac_info *sh_dmac = (volatile struct sh_dmac_info *)SH_DMAC_BASE;
-
 static inline unsigned int get_dmte_irq(unsigned int chan)
 {
 	unsigned int irq;
 
-	/* 
+	/*
 	 * Normally we could just do DMTE0_IRQ + chan outright, though in the
 	 * case of the 7751R, the DMTE IRQs for channels > 4 start right above
 	 * the SCIF
@@ -84,13 +70,17 @@ static inline unsigned int get_dmte_irq(unsigned int chan)
  * We determine the correct shift size based off of the CHCR transmit size
  * for the given channel. Since we know that it will take:
  *
- * 	info->count >> ts_shift[transmit_size]
+ *	info->count >> ts_shift[transmit_size]
  *
  * iterations to complete the transfer.
  */
-static inline unsigned int calc_xmit_shift(struct dma_info *info)
+static inline unsigned int calc_xmit_shift(struct dma_channel *chan)
 {
-	return ts_shift[(sh_dmac->channel[info->chan].chcr >> 4) & 0x0007];
+	u32 chcr = ctrl_inl(CHCR[chan->chan]);
+
+	chcr >>= 4;
+
+	return ts_shift[chcr & 0x0007];
 }
 
 /*
@@ -101,68 +91,79 @@ static inline unsigned int calc_xmit_shift(struct dma_info *info)
  */
 static irqreturn_t dma_tei(int irq, void *dev_id, struct pt_regs *regs)
 {
-	struct dma_info * info = (struct dma_info *)dev_id;
-	u32 chcr = sh_dmac->channel[info->chan].chcr;
+	struct dma_channel *chan = (struct dma_channel *)dev_id;
+	u32 chcr;
+
+	chcr = ctrl_inl(CHCR[chan->chan]);
 
 	if (!(chcr & CHCR_TE))
 		return IRQ_NONE;
 
-	sh_dmac->channel[info->chan].chcr = chcr & ~(CHCR_IE | CHCR_DE);
+	chcr &= ~(CHCR_IE | CHCR_DE);
+	ctrl_outl(chcr, CHCR[chan->chan]);
 
-	wake_up(&info->wait_queue);
+	wake_up(&chan->wait_queue);
 
 	return IRQ_HANDLED;
 }
 
-static int sh_dmac_request_dma(struct dma_info *info)
+static int sh_dmac_request_dma(struct dma_channel *chan)
 {
-	return request_irq(get_dmte_irq(info->chan), dma_tei,
-			   SA_INTERRUPT, "DMAC Transfer End", info);
+	return request_irq(get_dmte_irq(chan->chan), dma_tei,
+			   SA_INTERRUPT, "DMAC Transfer End", chan);
 }
 
-static void sh_dmac_free_dma(struct dma_info *info)
+static void sh_dmac_free_dma(struct dma_channel *chan)
 {
-	free_irq(get_dmte_irq(info->chan), info);
+	free_irq(get_dmte_irq(chan->chan), chan);
 }
 
-static void sh_dmac_configure_channel(struct dma_info *info, unsigned long chcr)
+static void sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
 {
 	if (!chcr)
 		chcr = RS_DUAL;
 
-	sh_dmac->channel[info->chan].chcr = chcr;
+	ctrl_outl(chcr, CHCR[chan->chan]);
 
-	info->configured = 1;
+	chan->flags |= DMA_CONFIGURED;
 }
 
-static void sh_dmac_enable_dma(struct dma_info *info)
+static void sh_dmac_enable_dma(struct dma_channel *chan)
 {
-	int irq = get_dmte_irq(info->chan);
+	int irq = get_dmte_irq(chan->chan);
+	u32 chcr;
+
+	chcr = ctrl_inl(CHCR[chan->chan]);
+	chcr |= CHCR_DE | CHCR_IE;
+	ctrl_outl(chcr, CHCR[chan->chan]);
 
-	sh_dmac->channel[info->chan].chcr |= (CHCR_DE | CHCR_IE);
 	enable_irq(irq);
 }
 
-static void sh_dmac_disable_dma(struct dma_info *info)
+static void sh_dmac_disable_dma(struct dma_channel *chan)
 {
-	int irq = get_dmte_irq(info->chan);
+	int irq = get_dmte_irq(chan->chan);
+	u32 chcr;
 
 	disable_irq(irq);
-	sh_dmac->channel[info->chan].chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
+
+	chcr = ctrl_inl(CHCR[chan->chan]);
+	chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
+	ctrl_outl(chcr, CHCR[chan->chan]);
 }
 
-static int sh_dmac_xfer_dma(struct dma_info *info)
+static int sh_dmac_xfer_dma(struct dma_channel *chan)
 {
-	/* 
+	/*
 	 * If we haven't pre-configured the channel with special flags, use
 	 * the defaults.
 	 */
-	if (!info->configured)
-		sh_dmac_configure_channel(info, 0);
+	if (!(chan->flags & DMA_CONFIGURED))
+		sh_dmac_configure_channel(chan, 0);
+
+	sh_dmac_disable_dma(chan);
 
-	sh_dmac_disable_dma(info);
-	
-	/* 
+	/*
 	 * Single-address mode usage note!
 	 *
 	 * It's important that we don't accidentally write any value to SAR/DAR
@@ -177,33 +178,36 @@ static int sh_dmac_xfer_dma(struct dma_info *info)
 	 * cascading to the PVR2 DMAC. In this case, we still need to write
 	 * SAR and DAR, regardless of value, in order for cascading to work.
 	 */
-	if (info->sar || (mach_is_dreamcast() && info->chan == 2))
-		sh_dmac->channel[info->chan].sar = info->sar;
-	if (info->dar || (mach_is_dreamcast() && info->chan == 2))
-		sh_dmac->channel[info->chan].dar = info->dar;
-	
-	sh_dmac->channel[info->chan].dmatcr = info->count >> calc_xmit_shift(info);
+	if (chan->sar || (mach_is_dreamcast() && chan->chan == 2))
+		ctrl_outl(chan->sar, SAR[chan->chan]);
+	if (chan->dar || (mach_is_dreamcast() && chan->chan == 2))
+		ctrl_outl(chan->dar, DAR[chan->chan]);
+
+	ctrl_outl(chan->count >> calc_xmit_shift(chan), DMATCR[chan->chan]);
 
-	sh_dmac_enable_dma(info);
+	sh_dmac_enable_dma(chan);
 
 	return 0;
 }
 
-static int sh_dmac_get_dma_residue(struct dma_info *info)
+static int sh_dmac_get_dma_residue(struct dma_channel *chan)
 {
-	if (!(sh_dmac->channel[info->chan].chcr & CHCR_DE))
+	if (!(ctrl_inl(CHCR[chan->chan]) & CHCR_DE))
 		return 0;
 
-	return sh_dmac->channel[info->chan].dmatcr << calc_xmit_shift(info);
+	return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan);
 }
 
 #if defined(CONFIG_CPU_SH4)
 static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs)
 {
-	printk("DMAE: DMAOR=%lx\n", sh_dmac->dmaor);
+	unsigned long dmaor = ctrl_inl(DMAOR);
 
-	sh_dmac->dmaor &= ~(DMAOR_NMIF | DMAOR_AE);
-	sh_dmac->dmaor |= DMAOR_DME;
+	printk("DMAE: DMAOR=%lx\n", dmaor);
+
+	ctrl_outl(ctrl_inl(DMAOR)&~DMAOR_NMIF, DMAOR);
+	ctrl_outl(ctrl_inl(DMAOR)&~DMAOR_AE, DMAOR);
+	ctrl_outl(ctrl_inl(DMAOR)|DMAOR_DME, DMAOR);
 
 	disable_irq(irq);
 
@@ -212,16 +216,23 @@ static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs)
 #endif
 
 static struct dma_ops sh_dmac_ops = {
-	.name		= "SuperH DMAC",
 	.request	= sh_dmac_request_dma,
 	.free		= sh_dmac_free_dma,
 	.get_residue	= sh_dmac_get_dma_residue,
 	.xfer		= sh_dmac_xfer_dma,
 	.configure	= sh_dmac_configure_channel,
 };
-	
+
+static struct dma_info sh_dmac_info = {
+	.name		= "SuperH DMAC",
+	.nr_channels	= 4,
+	.ops		= &sh_dmac_ops,
+	.flags		= DMAC_CHANNELS_TEI_CAPABLE,
+};
+
 static int __init sh_dmac_init(void)
 {
+	struct dma_info *info = &sh_dmac_info;
 	int i;
 
 #ifdef CONFIG_CPU_SH4
@@ -231,18 +242,15 @@ static int __init sh_dmac_init(void)
 		return i;
 #endif
 
-	for (i = 0; i < MAX_DMAC_CHANNELS; i++) {
+	for (i = 0; i < info->nr_channels; i++) {
 		int irq = get_dmte_irq(i);
 
 		make_ipr_irq(irq, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
-
-		dma_info[i].ops = &sh_dmac_ops;
-		dma_info[i].tei_capable = 1;
 	}
 
-	sh_dmac->dmaor |= 0x8000 | DMAOR_DME;
+	ctrl_outl(0x8000 | DMAOR_DME, DMAOR);
 
-	return register_dmac(&sh_dmac_ops);
+	return register_dmac(info);
 }
 
 static void __exit sh_dmac_exit(void)
diff --git a/arch/sh/drivers/dma/dma-sysfs.c b/arch/sh/drivers/dma/dma-sysfs.c
new file mode 100644
index 000000000000..71a6d4e7809f
--- /dev/null
+++ b/arch/sh/drivers/dma/dma-sysfs.c
@@ -0,0 +1,133 @@
+/*
+ * arch/sh/drivers/dma/dma-sysfs.c
+ *
+ * sysfs interface for SH DMA API
+ *
+ * Copyright (C) 2004  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/sysdev.h>
+#include <linux/module.h>
+#include <asm/dma.h>
+
+static struct sysdev_class dma_sysclass = {
+	set_kset_name("dma"),
+};
+
+EXPORT_SYMBOL(dma_sysclass);
+
+static ssize_t dma_show_devices(struct sys_device *dev, char *buf)
+{
+	ssize_t len = 0;
+	int i;
+
+	for (i = 0; i < MAX_DMA_CHANNELS; i++) {
+		struct dma_info *info = get_dma_info(i);
+		struct dma_channel *channel = &info->channels[i];
+
+		len += sprintf(buf + len, "%2d: %14s    %s\n",
+			       channel->chan, info->name,
+			       channel->dev_id);
+	}
+
+	return len;
+}
+
+static SYSDEV_ATTR(devices, S_IRUGO, dma_show_devices, NULL);
+
+static int __init dma_sysclass_init(void)
+{
+	int ret;
+
+	ret = sysdev_class_register(&dma_sysclass);
+	if (ret == 0)
+		sysfs_create_file(&dma_sysclass.kset.kobj, &attr_devices.attr);
+
+	return ret;
+}
+
+postcore_initcall(dma_sysclass_init);
+
+static ssize_t dma_show_dev_id(struct sys_device *dev, char *buf)
+{
+	struct dma_channel *channel = to_dma_channel(dev);
+	return sprintf(buf, "%s\n", channel->dev_id);
+}
+
+static ssize_t dma_store_dev_id(struct sys_device *dev,
+				const char *buf, size_t count)
+{
+	struct dma_channel *channel = to_dma_channel(dev);
+	strcpy(channel->dev_id, buf);
+	return count;
+}
+
+static SYSDEV_ATTR(dev_id, S_IRUGO | S_IWUSR, dma_show_dev_id, dma_store_dev_id);
+
+static ssize_t dma_store_config(struct sys_device *dev,
+				const char *buf, size_t count)
+{
+	struct dma_channel *channel = to_dma_channel(dev);
+	unsigned long config;
+
+	config = simple_strtoul(buf, NULL, 0);
+	dma_configure_channel(channel->chan, config);
+
+	return count;
+}
+
+static SYSDEV_ATTR(config, S_IWUSR, NULL, dma_store_config);
+
+static ssize_t dma_show_mode(struct sys_device *dev, char *buf)
+{
+	struct dma_channel *channel = to_dma_channel(dev);
+	return sprintf(buf, "0x%08x\n", channel->mode);
+}
+
+static ssize_t dma_store_mode(struct sys_device *dev,
+			      const char *buf, size_t count)
+{
+	struct dma_channel *channel = to_dma_channel(dev);
+	channel->mode = simple_strtoul(buf, NULL, 0);
+	return count;
+}
+
+static SYSDEV_ATTR(mode, S_IRUGO | S_IWUSR, dma_show_mode, dma_store_mode);
+
+#define dma_ro_attr(field, fmt)						\
+static ssize_t dma_show_##field(struct sys_device *dev, char *buf)	\
+{									\
+	struct dma_channel *channel = to_dma_channel(dev);		\
+	return sprintf(buf, fmt, channel->field);			\
+}									\
+static SYSDEV_ATTR(field, S_IRUGO, dma_show_##field, NULL);
+
+dma_ro_attr(count, "0x%08x\n");
+dma_ro_attr(flags, "0x%08lx\n");
+
+int __init dma_create_sysfs_files(struct dma_channel *chan)
+{
+	struct sys_device *dev = &chan->dev;
+	int ret;
+
+	dev->id  = chan->chan;
+	dev->cls = &dma_sysclass;
+
+	ret = sysdev_register(dev);
+	if (ret)
+		return ret;
+
+	sysdev_create_file(dev, &attr_dev_id);
+	sysdev_create_file(dev, &attr_count);
+	sysdev_create_file(dev, &attr_mode);
+	sysdev_create_file(dev, &attr_flags);
+	sysdev_create_file(dev, &attr_config);
+
+	return 0;
+}
+
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index 20e928162d1b..4923bbf5e8a9 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -12,4 +12,5 @@ obj-$(CONFIG_SH_DREAMCAST)		+= ops-dreamcast.o fixups-dreamcast.o \
 					   dma-dreamcast.o
 obj-$(CONFIG_SH_SECUREEDGE5410)		+= ops-snapgear.o
 obj-$(CONFIG_SH_BIGSUR)			+= ops-bigsur.o
+obj-$(CONFIG_SH_RTS7751R2D)		+= ops-rts7751r2d.o fixups-rts7751r2d.o
 
diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c
new file mode 100644
index 000000000000..7b5dbe157867
--- /dev/null
+++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c
@@ -0,0 +1,32 @@
+/*
+ * arch/sh/drivers/pci/fixups-rts7751r2d.c
+ *
+ * RTS7751R2D PCI fixups
+ *
+ * Copyright (C) 2003  Lineo uSolutions, Inc.
+ * Copyright (C) 2004  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include "pci-sh7751.h"
+#include <asm/io.h>
+
+#define PCIMCR_MRSET_OFF	0xBFFFFFFF
+#define PCIMCR_RFSH_OFF		0xFFFFFFFB
+
+int pci_fixup_pcic(void)
+{
+	unsigned long mcr;
+
+	outl(0xfb900047, SH7751_PCICONF1);
+	outl(0xab000001, SH7751_PCICONF4);
+
+	mcr = inl(SH7751_MCR);
+	mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
+	outl(mcr, SH7751_PCIMCR);
+
+	return 0;
+}
+
diff --git a/arch/sh/drivers/pci/ops-rts7751r2d.c b/arch/sh/drivers/pci/ops-rts7751r2d.c
new file mode 100644
index 000000000000..2bceb43c9a33
--- /dev/null
+++ b/arch/sh/drivers/pci/ops-rts7751r2d.c
@@ -0,0 +1,74 @@
+/*
+ * linux/arch/sh/kernel/pci-rts7751r2d.c
+ *
+ * Author:  Ian DaSilva (idasilva@mvista.com)
+ *
+ * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * PCI initialization for the Renesas SH7751R RTS7751R2D board
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pci.h>
+#include <linux/module.h>
+
+#include <asm/io.h>
+#include "pci-sh7751.h"
+#include <asm/rts7751r2d/rts7751r2d.h>
+
+int __init pcibios_map_platform_irq(u8 slot, u8 pin)
+{
+        switch (slot) {
+	case 0: return IRQ_PCISLOT1;	/* PCI Extend slot #1 */
+	case 1: return IRQ_PCISLOT2;	/* PCI Extend slot #2 */
+	case 2: return IRQ_PCMCIA;	/* PCI Cardbus Bridge */
+	case 3: return IRQ_PCIETH;	/* Realtek Ethernet controller */
+	default:
+		printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
+		return -1;
+	}
+}
+
+static struct resource sh7751_io_resource = {
+	.name	= "SH7751_IO",
+	.start	= 0x4000,
+	.end	= 0x4000 + SH7751_PCI_IO_SIZE - 1,
+	.flags	= IORESOURCE_IO
+};
+
+static struct resource sh7751_mem_resource = {
+	.name	= "SH7751_mem",
+	.start	= SH7751_PCI_MEMORY_BASE,
+	.end	= SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
+	.flags	= IORESOURCE_MEM
+};
+
+extern struct pci_ops sh7751_pci_ops;
+
+struct pci_channel board_pci_channels[] = {
+	{ &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
+	{ NULL, NULL, NULL, 0, 0 },
+};
+EXPORT_SYMBOL(board_pci_channels);
+
+static struct sh7751_pci_address_map sh7751_pci_map = {
+	.window0	= {
+		.base	= SH7751_CS3_BASE_ADDR,
+		.size	= 0x03f00000,
+	},
+
+	.flags	= SH7751_PCIC_NO_RESET,
+};
+
+int __init pcibios_init_platform(void)
+{
+	return sh7751_pcic_init(&sh7751_pci_map);
+}
+
diff --git a/arch/sh/drivers/pci/ops-snapgear.c b/arch/sh/drivers/pci/ops-snapgear.c
index b44fe7f5356c..6fdb9765c99a 100644
--- a/arch/sh/drivers/pci/ops-snapgear.c
+++ b/arch/sh/drivers/pci/ops-snapgear.c
@@ -61,6 +61,8 @@ static struct sh7751_pci_address_map sh7751_pci_map = {
 		.base	= SH7751_CS2_BASE_ADDR,
 		.size	= SNAPGEAR_LSR1_SIZE,
 	},
+
+	.flags	= SH7751_PCIC_NO_RESET,
 };
 
 /*
diff --git a/arch/sh/drivers/pci/pci-auto.c b/arch/sh/drivers/pci/pci-auto.c
index 65fb8832f3d7..2ad70d499114 100644
--- a/arch/sh/drivers/pci/pci-auto.c
+++ b/arch/sh/drivers/pci/pci-auto.c
@@ -45,7 +45,7 @@
 #include <linux/types.h>
 #include <linux/pci.h>
 
-#define	DEBUG
+#undef	DEBUG
 #ifdef 	DEBUG
 #define	DBG(x...)	printk(x)
 #else
@@ -106,7 +106,8 @@ static void __init
 pciauto_setup_bars(struct pci_channel *hose,
 		   int top_bus,
 		   int current_bus,
-		   int pci_devfn)
+		   int pci_devfn,
+		   int bar_limit)
 {
 	u32 bar_response, bar_size, bar_value;
 	u32 bar, addr_mask, bar_nr = 0;
@@ -114,7 +115,8 @@ pciauto_setup_bars(struct pci_channel *hose,
 	u32 * lower_limit;
 	int found_mem64 = 0;
 
-	for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar+=4) {
+	for (bar = PCI_BASE_ADDRESS_0; bar <= bar_limit; bar+=4) {
+#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
 		u32 bar_addr;
 
 		/* Read the old BAR value */
@@ -123,6 +125,7 @@ pciauto_setup_bars(struct pci_channel *hose,
 					pci_devfn,
 					bar,
 					&bar_addr);
+#endif
 
 		/* Tickle the BAR and get the response */
 		early_write_config_dword(hose, top_bus,
@@ -137,6 +140,7 @@ pciauto_setup_bars(struct pci_channel *hose,
 					bar,
 					&bar_response);
 
+#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
 		/* 
 		 * Write the old BAR value back out, only update the BAR
 		 * if we implicitly want resources to be updated, which
@@ -147,6 +151,7 @@ pciauto_setup_bars(struct pci_channel *hose,
 					 pci_devfn,
 					 bar,
 					 bar_addr);
+#endif
 
 		/* If BAR is not implemented go to the next BAR */
 		if (!bar_response)
@@ -287,6 +292,11 @@ pciauto_postscan_setup_bridge(struct pci_channel *hose,
 {
 	u32 temp;
 
+	/*
+	 * [jsun] we always bump up baselines a little, so that if there
+	 * nothing behind P2P bridge, we don't wind up overlapping IO/MEM
+	 * spaces.
+	 */
 	pciauto_lower_memspc += 1;
 	pciauto_lower_iospc += 1;
 
@@ -318,93 +328,99 @@ pciauto_postscan_setup_bridge(struct pci_channel *hose,
 
 static void __init
 pciauto_prescan_setup_cardbus_bridge(struct pci_channel *hose,
-                            int top_bus,
-                            int current_bus,
-                            int pci_devfn,
-                            int sub_bus)
+			int top_bus,
+			int current_bus,
+			int pci_devfn,
+			int sub_bus)
 {
-       /* Configure bus number registers */
-       early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                               PCI_PRIMARY_BUS, current_bus);
-       early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                               PCI_SECONDARY_BUS, sub_bus + 1);
-       early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                               PCI_SUBORDINATE_BUS, 0xff);
-
-       /* Align memory and I/O to 4KB and 4 byte boundaries. */
-       pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1))
-               & ~(0x1000 - 1);
-       pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1))
-               & ~(0x4 - 1);
-
-       early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-               PCI_CB_MEMORY_BASE_0, pciauto_lower_memspc);
-       early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-               PCI_CB_IO_BASE_0, pciauto_lower_iospc);  
+	/* Configure bus number registers */
+	early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
+				PCI_PRIMARY_BUS, current_bus);
+	early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
+				PCI_SECONDARY_BUS, sub_bus + 1);
+	early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
+				PCI_SUBORDINATE_BUS, 0xff);
+
+	/* Align memory and I/O to 4KB and 4 byte boundaries. */
+	pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1))
+		& ~(0x1000 - 1);
+	pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1))
+		& ~(0x4 - 1);
+
+	early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
+		PCI_CB_MEMORY_BASE_0, pciauto_lower_memspc);
+	early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
+		PCI_CB_IO_BASE_0, pciauto_lower_iospc);
 }
 
 static void __init
 pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose,
-                             int top_bus,
-                             int current_bus,
-                             int pci_devfn,
-                             int sub_bus)
+			int top_bus,
+			int current_bus,
+			int pci_devfn,
+			int sub_bus)
 {
-       u32 temp;
-
-       /* 
-        * [jsun] we always bump up baselines a little, so that if there 
-        * nothing behind P2P bridge, we don't wind up overlapping IO/MEM 
-        * spaces.
-        */
-       pciauto_lower_memspc += 1;
-       pciauto_lower_iospc += 1;
-
-       /*
-        * Configure subordinate bus number.  The PCI subsystem
-        * bus scan will renumber buses (reserving three additional
-        * for this PCI<->CardBus bridge for the case where a CardBus
-        * adapter contains a P2P or CB2CB bridge.
-        */
-
-       early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                               PCI_SUBORDINATE_BUS, sub_bus);
-
-       /*
-        * Reserve an additional 4MB for mem space and 16KB for
-        * I/O space.  This should cover any additional space
-        * requirement of unusual CardBus devices with 
-        * additional bridges that can consume more address space.
-        * 
-        * Although pcmcia-cs currently will reprogram bridge
-        * windows, the goal is to add an option to leave them
-        * alone and use the bridge window ranges as the regions
-        * that are searched for free resources upon hot-insertion
-        * of a device.  This will allow a PCI<->CardBus bridge
-        * configured by this routine to happily live behind a
-        * P2P bridge in a system.
-        */
-
-       /* Align memory and I/O to 4KB and 4 byte boundaries. */
-       pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1))
-               & ~(0x1000 - 1);
-       pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1))
-               & ~(0x4 - 1);
-       /* Set up memory and I/O filter limits, assume 32-bit I/O space */
-       early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-               PCI_CB_MEMORY_LIMIT_0, pciauto_lower_memspc - 1); 
-       early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-               PCI_CB_IO_LIMIT_0, pciauto_lower_iospc - 1);
-       
-       /* Enable memory and I/O accesses, enable bus master */
-       early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
-               PCI_COMMAND, &temp);
-       early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-               PCI_COMMAND, temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY
-               | PCI_COMMAND_MASTER);
+	u32 temp;
+
+#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
+	/*
+	 * [jsun] we always bump up baselines a little, so that if there
+	 * nothing behind P2P bridge, we don't wind up overlapping IO/MEM
+	 * spaces.
+	 */
+	pciauto_lower_memspc += 1;
+	pciauto_lower_iospc += 1;
+#endif
+
+	/*
+	 * Configure subordinate bus number.  The PCI subsystem
+	 * bus scan will renumber buses (reserving three additional
+	 * for this PCI<->CardBus bridge for the case where a CardBus
+	 * adapter contains a P2P or CB2CB bridge.
+	 */
+
+	early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
+				PCI_SUBORDINATE_BUS, sub_bus);
+
+	/*
+	 * Reserve an additional 4MB for mem space and 16KB for
+	 * I/O space.  This should cover any additional space
+	 * requirement of unusual CardBus devices with
+	 * additional bridges that can consume more address space.
+	 *
+	 * Although pcmcia-cs currently will reprogram bridge
+	 * windows, the goal is to add an option to leave them
+	 * alone and use the bridge window ranges as the regions
+	 * that are searched for free resources upon hot-insertion
+	 * of a device.  This will allow a PCI<->CardBus bridge
+	 * configured by this routine to happily live behind a
+	 * P2P bridge in a system.
+	 */
+#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D)
+	pciauto_lower_memspc += 0x00400000;
+	pciauto_lower_iospc += 0x00004000;
+#endif
+
+	/* Align memory and I/O to 4KB and 4 byte boundaries. */
+	pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1))
+		& ~(0x1000 - 1);
+	pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1))
+		& ~(0x4 - 1);
+	/* Set up memory and I/O filter limits, assume 32-bit I/O space */
+	early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
+		PCI_CB_MEMORY_LIMIT_0, pciauto_lower_memspc - 1);
+	early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
+		PCI_CB_IO_LIMIT_0, pciauto_lower_iospc - 1);
+
+	/* Enable memory and I/O accesses, enable bus master */
+	early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
+		PCI_COMMAND, &temp);
+	early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
+		PCI_COMMAND, temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
+		PCI_COMMAND_MASTER);
 }
 
-#define      PCIAUTO_IDE_MODE_MASK           0x05
+#define	PCIAUTO_IDE_MODE_MASK		0x05
 
 static int __init
 pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
@@ -455,6 +471,9 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
 		if ((pci_class >> 16) == PCI_CLASS_BRIDGE_PCI) {
 			DBG("        Bridge: primary=%.2x, secondary=%.2x\n",
 				current_bus, sub_bus + 1);
+#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D)
+			pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_1);
+#endif
 			pciauto_prescan_setup_bridge(hose, top_bus, current_bus,
 						     pci_devfn, sub_bus);
 			DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n",
@@ -463,26 +482,26 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
 			sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1);
 			DBG("Back to bus %.2x\n", current_bus);
 			pciauto_postscan_setup_bridge(hose, top_bus, current_bus,
-						      pci_devfn, sub_bus);
+							pci_devfn, sub_bus);
 			continue;
-                } else if ((pci_class >> 16) == PCI_CLASS_BRIDGE_CARDBUS) {
-                        DBG("  CARDBUS  Bridge: primary=%.2x, secondary=%.2x\n",
-                                current_bus, sub_bus + 1);
-                        DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn));
-                        /* Place CardBus Socket/ExCA registers */
-                        pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn);
+		} else if ((pci_class >> 16) == PCI_CLASS_BRIDGE_CARDBUS) {
+			DBG("  CARDBUS  Bridge: primary=%.2x, secondary=%.2x\n",
+				current_bus, sub_bus + 1);
+			DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn));
+			/* Place CardBus Socket/ExCA registers */
+			pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_0);
  
-                        pciauto_prescan_setup_cardbus_bridge(hose, top_bus, 
-                                        current_bus, pci_devfn, sub_bus);
+			pciauto_prescan_setup_cardbus_bridge(hose, top_bus,
+					current_bus, pci_devfn, sub_bus);
  
-                        DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n",
-                                sub_bus + 1,
-                                pciauto_lower_iospc, pciauto_lower_memspc);
-                        sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1);
-                        DBG("Back to bus %.2x, sub_bus is %x\n", current_bus, sub_bus);
-                        pciauto_postscan_setup_cardbus_bridge(hose, top_bus, 
-                                        current_bus, pci_devfn, sub_bus);
-                        continue;
+			DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n",
+				sub_bus + 1,
+				pciauto_lower_iospc, pciauto_lower_memspc);
+			sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1);
+			DBG("Back to bus %.2x, sub_bus is %x\n", current_bus, sub_bus);
+			pciauto_postscan_setup_cardbus_bridge(hose, top_bus,
+					current_bus, pci_devfn, sub_bus);
+			continue;
 		} else if ((pci_class >> 16) == PCI_CLASS_STORAGE_IDE) {
 
 			unsigned char prg_iface;
@@ -495,7 +514,7 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
 			}
 		}
 
- 		/*
+		/*
 		 * Found a peripheral, enable some standard
 		 * settings
 		 */
@@ -509,7 +528,7 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
 					PCI_LATENCY_TIMER, 0x80);
 
 		/* Allocate PCI I/O and/or memory space */
-		pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn);
+		pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_5);
 	}
 	return sub_bus;
 }
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index e53823e65dcc..b2bb72972bdb 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -31,6 +31,7 @@
 #include "pci-sh7751.h"
 
 static unsigned int pci_probe = PCI_PROBE_CONF1;
+extern int pci_fixup_pcic(void);
 
 /*
  * Direct access to PCI hardware...
@@ -74,7 +75,8 @@ static int sh7751_pci_read(struct pci_bus *bus, unsigned int devfn,
 }
 
 /* 
- * Since SH7751 only does 32bit access we'll have to do a read,mask,write operation.  
+ * Since SH7751 only does 32bit access we'll have to do a read,
+ * mask,write operation.
  * We'll allow an odd byte offset, though it should be illegal.
  */ 
 static int sh7751_pci_write(struct pci_bus *bus, unsigned int devfn,
@@ -156,6 +158,7 @@ static int __init pci_check_direct(void)
  *  Handle bus scanning and fixups ....
  */
 
+#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
 static void __init pci_fixup_ide_bases(struct pci_dev *d)
 {
 	int i;
@@ -174,11 +177,13 @@ static void __init pci_fixup_ide_bases(struct pci_dev *d)
 		}
 	}
 }
-
+#endif
 
 /* Add future fixups here... */
 struct pci_fixup pcibios_fixups[] = {
+#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
 	{ PCI_FIXUP_HEADER,	PCI_ANY_ID,	PCI_ANY_ID,	pci_fixup_ide_bases },
+#endif
 	{ 0 }
 };
 
@@ -261,19 +266,19 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map)
 	outl(word, PCI_REG(SH7751_PCICLKR));
 
 	/*
-	 * XXX: This code is unused for the SnapGear boards as it is done in
-	 * the bootloader and doing it here means the MAC addresses loaded by
-	 * the bootloader get lost.
+	 * This code is unused for some boards as it is done in the
+	 * bootloader and doing it here means the MAC addresses loaded
+	 * by the bootloader get lost.
 	 */
-#ifndef CONFIG_SH_SECUREEDGE5410
-	/* toggle PCI reset pin */
-	word = SH7751_PCICR_PREFIX | SH7751_PCICR_PRST;
-	outl(word,PCI_REG(SH7751_PCICR));    
-	/* Wait for a long time... not 1 sec. but long enough */
-	mdelay(100);
-	word = SH7751_PCICR_PREFIX;
-	outl(word,PCI_REG(SH7751_PCICR)); 
-#endif
+	if (!(map->flags & SH7751_PCIC_NO_RESET)) {
+		/* toggle PCI reset pin */
+		word = SH7751_PCICR_PREFIX | SH7751_PCICR_PRST;
+		outl(word,PCI_REG(SH7751_PCICR));
+		/* Wait for a long time... not 1 sec. but long enough */
+		mdelay(100);
+		word = SH7751_PCICR_PREFIX;
+		outl(word,PCI_REG(SH7751_PCICR));
+	}
 	
 	/* set the command/status bits to:
 	 * Wait Cycle Control + Parity Enable + Bus Master +
@@ -364,6 +369,10 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map)
 	 * DMA interrupts...
 	 */
 	 
+#ifdef CONFIG_SH_RTS7751R2D
+	pci_fixup_pcic();
+#endif
+
 	/* SH7751 init done, set central function init complete */
 	/* use round robin mode to stop a device starving/overruning */
 	word = SH7751_PCICR_PREFIX | SH7751_PCICR_CFIN | SH7751_PCICR_ARBM;
diff --git a/arch/sh/drivers/pci/pci-sh7751.h b/arch/sh/drivers/pci/pci-sh7751.h
index b8b1d421aec7..1fee5cae10d1 100644
--- a/arch/sh/drivers/pci/pci-sh7751.h
+++ b/arch/sh/drivers/pci/pci-sh7751.h
@@ -234,6 +234,7 @@
 #define SH7751_PCIWCR2             0x1EC         /* Wait Control 2 Register */
 #define SH7751_PCIWCR3             0x1F0         /* Wait Control 3 Register */
 #define SH7751_PCIMCR              0x1F4         /* Memory Control Register */
+#define SH7751_PCIBCR3		   0x1f8	 /* Memory BCR3 Register */
 #define SH7751_PCIPCTR             0x200         /* Port Control Register */
   #define SH7751_PCIPCTR_P2EN        0x000400000 /* Port 2 Enable */
   #define SH7751_PCIPCTR_P1EN        0x000200000 /* Port 1 Enable */
@@ -256,6 +257,8 @@
 /* Memory Control Registers */
 #define SH7751_BCR1                0xFF800000    /* Memory BCR1 Register */
 #define SH7751_BCR2                0xFF800004    /* Memory BCR2 Register */
+#define SH7751_BCR3                0xFF800050    /* Memory BCR3 Register */
+#define SH7751_BCR4                0xFE0A00F0    /* Memory BCR4 Register */
 #define SH7751_WCR1                0xFF800008    /* Wait Control 1 Register */
 #define SH7751_WCR2                0xFF80000C    /* Wait Control 2 Register */
 #define SH7751_WCR3                0xFF800010    /* Wait Control 3 Register */
@@ -274,6 +277,9 @@
 /* General PCI values */
 #define SH7751_PCI_HOST_BRIDGE		0x6
 
+/* Flags */
+#define SH7751_PCIC_NO_RESET	0x0001
+
 /* External functions defined per platform i.e. Big Sur, SE... (these could be routed 
  * through the machine vectors... */
 extern int pcibios_init_platform(void);
@@ -287,6 +293,7 @@ struct sh7751_pci_address_space {
 struct sh7751_pci_address_map {
 	struct sh7751_pci_address_space window0;
 	struct sh7751_pci_address_space window1;
+	unsigned long flags;
 };
 
 /* arch/sh/drivers/pci/pci-sh7751.c */
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index fce69a2ecd15..4bf35336d824 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -25,7 +25,7 @@ static int __init pcibios_init(void)
 
 #ifdef CONFIG_PCI_AUTO
 	/* assign resources */
-	busno=0;
+	busno = 0;
 	for (p = board_pci_channels; p->pci_ops != NULL; p++) {
 		busno = pciauto_assign_resources(busno, p) + 1;
 	}
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index a7c247a30c5e..d36bd9410146 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_SH_STANDARD_BIOS)	+= sh_bios.o
 obj-$(CONFIG_SH_KGDB)		+= kgdb_stub.o kgdb_jmp.o
 obj-$(CONFIG_SH_CPU_FREQ)	+= cpufreq.o
 obj-$(CONFIG_MODULES)		+= module.o
+obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
 
 USE_STANDARD_AS_RULE := true
 
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index bf3a311c9f35..cd43714df61a 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the Linux/SuperH CPU-specifc backends.
 #
 
-obj-y	:= irq_ipr.o irq_imask.o init.o
+obj-y	:= irq_ipr.o irq_imask.o init.o bus.o
 
 obj-$(CONFIG_CPU_SH2)		+= sh2/
 obj-$(CONFIG_CPU_SH3)		+= sh3/
@@ -10,6 +10,7 @@ obj-$(CONFIG_CPU_SH4)		+= sh4/
 
 obj-$(CONFIG_SH_RTC)            += rtc.o
 obj-$(CONFIG_UBC_WAKEUP)	+= ubc.o
+obj-$(CONFIG_SH_ADC)            += adc.o
 
 USE_STANDARD_AS_RULE := true
 
diff --git a/arch/sh/kernel/cpu/adc.c b/arch/sh/kernel/cpu/adc.c
new file mode 100644
index 000000000000..da3d6877f93d
--- /dev/null
+++ b/arch/sh/kernel/cpu/adc.c
@@ -0,0 +1,36 @@
+/*
+ * linux/arch/sh/kernel/adc.c -- SH3 on-chip ADC support
+ *
+ *  Copyright (C) 2004  Andriy Skulysh <askulysh@image.kiev.ua>
+ */
+
+#include <linux/module.h>
+#include <asm/adc.h>
+#include <asm/io.h>
+
+
+int adc_single(unsigned int channel)
+{
+	int off;
+	unsigned char csr;
+
+	if (channel >= 8) return -1;
+
+	off = (channel & 0x03) << 2;
+
+	csr = ctrl_inb(ADCSR);
+	csr = channel | ADCSR_ADST | ADCSR_CKS;
+	ctrl_outb(csr, ADCSR);
+
+	do {
+		csr = ctrl_inb(ADCSR);
+	} while ((csr & ADCSR_ADF) == 0);
+
+	csr &= ~(ADCSR_ADF | ADCSR_ADST);
+	ctrl_outb(csr, ADCSR);
+
+	return (((ctrl_inb(ADDRAH + off) << 8) |
+		ctrl_inb(ADDRAL + off)) >> 6);
+}
+
+EXPORT_SYMBOL(adc_single);
diff --git a/arch/sh/kernel/cpu/bus.c b/arch/sh/kernel/cpu/bus.c
new file mode 100644
index 000000000000..ace82f4b4a59
--- /dev/null
+++ b/arch/sh/kernel/cpu/bus.c
@@ -0,0 +1,195 @@
+/*
+ * arch/sh/kernel/cpu/bus.c
+ *
+ * Virtual bus for SuperH.
+ *
+ * Copyright (C) 2004 Paul Mundt
+ *
+ * Shamelessly cloned from arch/arm/mach-omap/bus.c, which was written
+ * by:
+ *
+ *  	Copyright (C) 2003 - 2004 Nokia Corporation
+ *  	Written by Tony Lindgren <tony@atomide.com>
+ *  	Portions of code based on sa1111.c.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <asm/bus-sh.h>
+
+static int sh_bus_match(struct device *dev, struct device_driver *drv)
+{
+	struct sh_driver *shdrv = to_sh_driver(drv);
+	struct sh_dev *shdev = to_sh_dev(dev);
+
+	return shdev->dev_id == shdrv->dev_id;
+}
+
+static int sh_bus_suspend(struct device *dev, u32 state)
+{
+	struct sh_dev *shdev = to_sh_dev(dev);
+	struct sh_driver *shdrv = to_sh_driver(dev->driver);
+
+	if (shdrv && shdrv->suspend)
+		return shdrv->suspend(shdev, state);
+
+	return 0;
+}
+
+static int sh_bus_resume(struct device *dev)
+{
+	struct sh_dev *shdev = to_sh_dev(dev);
+	struct sh_driver *shdrv = to_sh_driver(dev->driver);
+
+	if (shdrv && shdrv->resume)
+		return shdrv->resume(shdev);
+
+	return 0;
+}
+
+static struct device sh_bus_devices[SH_NR_BUSES] = {
+	{
+		.bus_id		= SH_BUS_NAME_VIRT,
+	},
+};
+
+struct bus_type sh_bus_types[SH_NR_BUSES] = {
+	{
+		.name		= SH_BUS_NAME_VIRT,
+		.match		= sh_bus_match,
+		.suspend	= sh_bus_suspend,
+		.resume		= sh_bus_resume,
+	},
+};
+
+static int sh_device_probe(struct device *dev)
+{
+	struct sh_dev *shdev = to_sh_dev(dev);
+	struct sh_driver *shdrv = to_sh_driver(dev->driver);
+
+	if (shdrv && shdrv->probe)
+		return shdrv->probe(shdev);
+
+	return -ENODEV;
+}
+
+static int sh_device_remove(struct device *dev)
+{
+	struct sh_dev *shdev = to_sh_dev(dev);
+	struct sh_driver *shdrv = to_sh_driver(dev->driver);
+
+	if (shdrv && shdrv->remove)
+		return shdrv->remove(shdev);
+
+	return 0;
+}
+
+int sh_device_register(struct sh_dev *dev)
+{
+	if (!dev)
+		return -EINVAL;
+
+	if (dev->bus_id < 0 || dev->bus_id >= SH_NR_BUSES) {
+		printk(KERN_ERR "%s: bus_id invalid: %s bus: %d\n",
+		       __FUNCTION__, dev->name, dev->bus_id);
+		return -EINVAL;
+	}
+
+	dev->dev.parent = &sh_bus_devices[dev->bus_id];
+	dev->dev.bus    = &sh_bus_types[dev->bus_id];
+
+	/* This is needed for USB OHCI to work */
+	if (dev->dma_mask)
+		dev->dev.dma_mask = dev->dma_mask;
+
+	snprintf(dev->dev.bus_id, BUS_ID_SIZE, "%s%u",
+		 dev->name, dev->dev_id);
+
+	printk(KERN_INFO "Registering SH device '%s'. Parent at %s\n",
+	       dev->dev.bus_id, dev->dev.parent->bus_id);
+
+	return device_register(&dev->dev);
+}
+
+void sh_device_unregister(struct sh_dev *dev)
+{
+	device_unregister(&dev->dev);
+}
+
+int sh_driver_register(struct sh_driver *drv)
+{
+	if (!drv)
+		return -EINVAL;
+
+	if (drv->bus_id < 0 || drv->bus_id >= SH_NR_BUSES) {
+		printk(KERN_ERR "%s: bus_id invalid: bus: %d device %d\n",
+		       __FUNCTION__, drv->bus_id, drv->dev_id);
+		return -EINVAL;
+	}
+
+	drv->drv.probe  = sh_device_probe;
+	drv->drv.remove = sh_device_remove;
+	drv->drv.bus    = &sh_bus_types[drv->bus_id];
+
+	return driver_register(&drv->drv);
+}
+
+void sh_driver_unregister(struct sh_driver *drv)
+{
+	driver_unregister(&drv->drv);
+}
+
+static int __init sh_bus_init(void)
+{
+	int i, ret = 0;
+
+	for (i = 0; i < SH_NR_BUSES; i++) {
+		ret = device_register(&sh_bus_devices[i]);
+		if (ret != 0) {
+			printk(KERN_ERR "Unable to register bus device %s\n",
+			       sh_bus_devices[i].bus_id);
+			continue;
+		}
+
+		ret = bus_register(&sh_bus_types[i]);
+		if (ret != 0) {
+			printk(KERN_ERR "Unable to register bus %s\n",
+			       sh_bus_types[i].name);
+			device_unregister(&sh_bus_devices[i]);
+		}
+	}
+
+	printk(KERN_INFO "SH Virtual Bus initialized\n");
+
+	return ret;
+}
+
+static void __exit sh_bus_exit(void)
+{
+	int i;
+
+	for (i = 0; i < SH_NR_BUSES; i++) {
+		bus_unregister(&sh_bus_types[i]);
+		device_unregister(&sh_bus_devices[i]);
+	}
+}
+
+module_init(sh_bus_init);
+module_exit(sh_bus_exit);
+
+MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
+MODULE_DESCRIPTION("SH Virtual Bus");
+MODULE_LICENSE("GPL");
+
+EXPORT_SYMBOL(sh_bus_types);
+EXPORT_SYMBOL(sh_device_register);
+EXPORT_SYMBOL(sh_device_unregister);
+EXPORT_SYMBOL(sh_driver_register);
+EXPORT_SYMBOL(sh_driver_unregister);
+
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index a81b3401f7fa..975103f34653 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -42,7 +42,7 @@ onchip_setup(dsp);
  */
 static void __init cache_init(void)
 {
-	unsigned long ccr, flags = 0;
+	unsigned long ccr, flags;
 
 	if (cpu_data->type == CPU_SH_NONE)
 		panic("Unknown CPU");
@@ -54,42 +54,50 @@ static void __init cache_init(void)
 	 * If the cache is already enabled .. flush it.
 	 */
 	if (ccr & CCR_CACHE_ENABLE) {
-		unsigned long entries, i, j;
+		unsigned long ways, waysize, addrstart;
 
-		entries = cpu_data->dcache.sets;
+		waysize = cpu_data->dcache.sets;
 
 		/*
 		 * If the OC is already in RAM mode, we only have
 		 * half of the entries to flush..
 		 */
 		if (ccr & CCR_CACHE_ORA)
-			entries >>= 1;
+			waysize >>= 1;
 
-		for (i = 0; i < entries; i++) {
-			for (j = 0; j < cpu_data->dcache.ways; j++) {
-				unsigned long data, addr;
+		waysize <<= cpu_data->dcache.entry_shift;
 
-				addr = CACHE_OC_ADDRESS_ARRAY |
-					(j << cpu_data->dcache.way_shift) |
-					(i << cpu_data->dcache.entry_shift);
+#ifdef CCR_CACHE_EMODE
+		/* If EMODE is not set, we only have 1 way to flush. */
+		if (!(ccr & CCR_CACHE_EMODE))
+			ways = 1;
+		else
+#endif
+			ways = cpu_data->dcache.ways;
 
-				data = ctrl_inl(addr);
+		addrstart = CACHE_OC_ADDRESS_ARRAY;
+		do {
+			unsigned long addr;
 
-				if ((data & (SH_CACHE_UPDATED | SH_CACHE_VALID))
-					== (SH_CACHE_UPDATED | SH_CACHE_VALID))
-					ctrl_outl(data & ~SH_CACHE_UPDATED, addr);
-			}
-		}
+			for (addr = addrstart;
+			     addr < addrstart + waysize;
+			     addr += cpu_data->dcache.linesz)
+				ctrl_outl(0, addr);
+
+			addrstart += cpu_data->dcache.way_incr;
+		} while (--ways);
 	}
 
 	/* 
 	 * Default CCR values .. enable the caches
-	 * and flush them immediately..
+	 * and invalidate them immediately..
 	 */
-	flags |= CCR_CACHE_ENABLE | CCR_CACHE_INVALIDATE;
-	
+	flags = CCR_CACHE_ENABLE | CCR_CACHE_INVALIDATE;
+
 #ifdef CCR_CACHE_EMODE
-	flags |= (ccr & CCR_CACHE_EMODE);
+	/* Force EMODE if possible */
+	if (cpu_data->dcache.ways > 1)
+		flags |= CCR_CACHE_EMODE;
 #endif
 
 #ifdef CONFIG_SH_WRITETHROUGH
@@ -145,8 +153,8 @@ static void __init dsp_init(void)
 
 	/* If the DSP bit is still set, this CPU has a DSP */
 	if (sr & SR_DSP)
-		set_bit(CPU_HAS_DSP, &(cpu_data->flags));
-	
+		cpu_data->flags |= CPU_HAS_DSP;
+
 	/* Now that we've determined the DSP status, clear the DSP bit. */
 	release_dsp();
 }
@@ -184,7 +192,7 @@ asmlinkage void __init sh_cpu_init(void)
 	}
 
 	/* FPU initialization */
-	if (test_bit(CPU_HAS_FPU, &(cpu_data->flags))) {
+	if ((cpu_data->flags & CPU_HAS_FPU)) {
 		clear_thread_flag(TIF_USEDFPU);
 		current->used_math = 0;
 	}
diff --git a/arch/sh/kernel/cpu/irq_ipr.c b/arch/sh/kernel/cpu/irq_ipr.c
index c66d6227965a..daae02e6b56d 100644
--- a/arch/sh/kernel/cpu/irq_ipr.c
+++ b/arch/sh/kernel/cpu/irq_ipr.c
@@ -4,12 +4,13 @@
  *
  * Copyright (C) 1999  Niibe Yutaka & Takeshi Yaegashi
  * Copyright (C) 2000  Kazumoto Kojima
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
  *
  * Interrupt handling for IPR-based IRQ.
  *
  * Supported system:
  *	On-chip supporting modules (TMU, RTC, etc.).
- *	On-chip supporting modules for SH7709/SH7709A/SH7729.
+ *	On-chip supporting modules for SH7709/SH7709A/SH7729/SH7300.
  *	Hitachi SolutionEngine external I/O:
  *		MS7709SE01, MS7709ASE01, and MS7750SE01
  *
@@ -88,7 +89,8 @@ static void mask_and_ack_ipr(unsigned int irq)
 {
 	disable_ipr_irq(irq);
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
 	/* This is needed when we use edge triggered setting */
 	/* XXX: Is it really needed? */
 	if (IRQ0_IRQ <= irq && irq <= IRQ5_IRQ) {
@@ -117,7 +119,9 @@ void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority)
 	disable_ipr_irq(irq);
 }
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
 static unsigned char pint_map[256];
 static unsigned long portcr_mask = 0;
 
@@ -131,7 +135,7 @@ static void mask_and_ack_pint(unsigned int);
 static void end_pint_irq(unsigned int irq);
 
 static unsigned int startup_pint_irq(unsigned int irq)
-{ 
+{
 	enable_pint_irq(irq);
 	return 0; /* never anything pending */
 }
@@ -191,13 +195,17 @@ void make_pint_irq(unsigned int irq)
 
 void __init init_IRQ(void)
 {
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
 	int i;
 #endif
 
 	make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY);
 	make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY);
+#if defined(CONFIG_SH_RTC)
 	make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY);
+#endif
 
 #ifdef SCI_ERI_IRQ
 	make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
@@ -212,6 +220,13 @@ void __init init_IRQ(void)
 	make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
 #endif
 
+#if defined(CONFIG_CPU_SUBTYPE_SH7300)
+	make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY);
+	make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
+	make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
+	make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
+#endif
+
 #ifdef SCIF_ERI_IRQ
 	make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
 	make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
@@ -226,11 +241,12 @@ void __init init_IRQ(void)
 	make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
 #endif
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
 	/*
 	 * Initialize the Interrupt Controller (INTC)
 	 * registers to their power on values
-	 */ 
+	 */
 
 	/*
 	 * Enable external irq (INTC IRQ mode).
@@ -243,6 +259,7 @@ void __init init_IRQ(void)
 	make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY);
 	make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY);
 	make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY);
+#if !defined(CONFIG_CPU_SUBTYPE_SH7300)
 	make_ipr_irq(PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY);
 	make_ipr_irq(PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY);
 	enable_ipr_irq(PINT0_IRQ);
@@ -261,16 +278,19 @@ void __init init_IRQ(void)
 		else if(i & 0x40) pint_map[i] = 6;
 		else if(i & 0x80) pint_map[i] = 7;
 	}
-#endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 */
+#endif /* !CONFIG_CPU_SUBTYPE_SH7300 */
+#endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709  || CONFIG_CPU_SUBTYPE_SH7300*/
 
 	/* Perform the machine specific initialisation */
 	if (sh_mv.mv_init_irq != NULL) {
 		sh_mv.mv_init_irq();
 	}
 }
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
 int ipr_irq_demux(int irq)
 {
+#if !defined(CONFIG_CPU_SUBTYPE_SH7300)
 	unsigned long creg, dreg, d, sav;
 
 	if(irq == PINT0_IRQ)
@@ -305,6 +325,7 @@ int ipr_irq_demux(int irq)
 		if(d == 0) return irq;
 		return PINT_IRQ_BASE + 8 + pint_map[d];
 	}
+#endif
 	return irq;
 }
 #endif
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index 78df0d1bf060..966c0858b714 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -85,7 +85,8 @@ ENTRY(interrupt_table)
 	.long	do_IRQ	!      rovi
 	.long	do_IRQ			
 	.long	do_IRQ			/* 5E0 */
-#if  defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if  defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
+     defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
 	.long	do_IRQ	! 32 IRQ  irq0	/* 600 */
 	.long	do_IRQ	! 33      irq1
 	.long	do_IRQ	! 34      irq2
@@ -115,10 +116,84 @@ ENTRY(interrupt_table)
 	.long	do_IRQ	! 58      bri2
 	.long	do_IRQ	! 59      txi2
 	.long	do_IRQ	! 60 ADC  adi	/* 980 */
-#if defined(CONFIG_CPU_SUBTYPE_SH7707)
+#if defined(CONFIG_CPU_SUBTYPE_SH7705)
+	.long	exception_none	! 61	/* 9A0 */
+	.long	exception_none	! 62
+	.long	exception_none	! 63
+	.long	exception_none	! 64	/* A00 */
+	.long	do_IRQ	! 65 USB  usi0
+	.long	do_IRQ	! 66      usi1
+	.long	exception_none	! 67
+	.long	exception_none	! 68
+	.long	exception_none	! 69
+	.long	exception_none	! 70
+	.long	exception_none	! 71
+	.long	exception_none	! 72	/* B00 */
+	.long	exception_none	! 73
+	.long	exception_none	! 74
+	.long	exception_none	! 75
+	.long	exception_none	! 76
+	.long	exception_none	! 77
+	.long	exception_none	! 78
+	.long	exception_none	! 79
+	.long	do_IRQ	! 80 TPU0 tpi0	/* C00 */
+	.long	do_IRQ	! 81 TPU1 tpi1
+	.long	exception_none	! 82
+	.long	exception_none	! 83
+	.long	do_IRQ	! 84 TPU2 tpi2
+	.long	do_IRQ	! 85 TPU3 tpi3	/* CA0 */
+#endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7300)
 	.long   do_IRQ	! 61 LCDC lcdi	/* 9A0 */
 	.long   do_IRQ	! 62 PCC  pcc0i
 	.long   do_IRQ	! 63      pcc1i	/* 9E0 */
 #endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7300)
+	.long   do_IRQ	! 64
+	.long   do_IRQ	! 65
+	.long   do_IRQ	! 66
+	.long   do_IRQ	! 67
+	.long   do_IRQ	! 68
+	.long   do_IRQ	! 69
+	.long   do_IRQ	! 70
+	.long   do_IRQ	! 71
+	.long   do_IRQ	! 72
+	.long   do_IRQ	! 73
+	.long   do_IRQ	! 74
+	.long   do_IRQ	! 75
+	.long   do_IRQ	! 76
+	.long   do_IRQ	! 77
+	.long   do_IRQ	! 78
+	.long   do_IRQ	! 79
+	.long   do_IRQ	! 80 SCIF0(SH7300)
+	.long   do_IRQ	! 81
+	.long   do_IRQ	! 82
+	.long   do_IRQ	! 83
+	.long   do_IRQ	! 84
+	.long   do_IRQ	! 85
+	.long   do_IRQ	! 86
+	.long   do_IRQ	! 87
+	.long   do_IRQ	! 88
+	.long   do_IRQ	! 89
+	.long   do_IRQ	! 90
+	.long   do_IRQ	! 91
+	.long   do_IRQ	! 92
+	.long   do_IRQ	! 93
+	.long   do_IRQ	! 94
+	.long   do_IRQ	! 95
+	.long   do_IRQ	! 96
+	.long   do_IRQ	! 97
+	.long   do_IRQ	! 98
+	.long   do_IRQ	! 99
+	.long   do_IRQ	! 100
+	.long   do_IRQ	! 101
+	.long   do_IRQ	! 102
+	.long   do_IRQ	! 103
+	.long   do_IRQ	! 104
+	.long   do_IRQ	! 105
+	.long   do_IRQ	! 106
+	.long   do_IRQ	! 107
+	.long   do_IRQ	! 108
+#endif
 #endif
 
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
new file mode 100644
index 000000000000..8c2769c0d9ff
--- /dev/null
+++ b/arch/sh/kernel/early_printk.c
@@ -0,0 +1,135 @@
+/*
+ * arch/sh/kernel/early_printk.c
+ *
+ *  Copyright (C) 1999, 2000  Niibe Yutaka
+ *  Copyright (C) 2002  M. R. Brown
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/console.h>
+#include <linux/tty.h>
+#include <linux/init.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_SH_STANDARD_BIOS
+#include <asm/sh_bios.h>
+
+/*
+ *	Print a string through the BIOS
+ */
+static void sh_console_write(struct console *co, const char *s,
+				 unsigned count)
+{
+	sh_bios_console_write(s, count);
+}
+
+/*
+ *	Setup initial baud/bits/parity. We do two things here:
+ *	- construct a cflag setting for the first rs_open()
+ *	- initialize the serial port
+ *	Return non-zero if we didn't find a serial port.
+ */
+static int __init sh_console_setup(struct console *co, char *options)
+{
+	int	cflag = CREAD | HUPCL | CLOCAL;
+
+	/*
+	 *	Now construct a cflag setting.
+	 *	TODO: this is a totally bogus cflag, as we have
+	 *	no idea what serial settings the BIOS is using, or
+	 *	even if its using the serial port at all.
+	 */
+	cflag |= B115200 | CS8 | /*no parity*/0;
+
+	co->cflag = cflag;
+
+	return 0;
+}
+
+static struct console early_console = {
+	.name		= "bios",
+	.write		= sh_console_write,
+	.setup		= sh_console_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+};
+#endif
+
+#ifdef CONFIG_EARLY_SCIF_CONSOLE
+#define SCIF_REG	0xffe80000
+
+static void scif_sercon_putc(int c)
+{
+	while (!(ctrl_inw(SCIF_REG + 0x10) & 0x20)) ;
+
+	ctrl_outb(c, SCIF_REG + 12);
+	ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0x9f), SCIF_REG + 0x10);
+
+	if (c == '\n')
+		scif_sercon_putc('\r');
+}
+
+static void scif_sercon_flush(void)
+{
+	ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10);
+
+	while (!(ctrl_inw(SCIF_REG + 0x10) & 0x40)) ;
+
+	ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10);
+}
+
+static void scif_sercon_write(struct console *con, const char *s, unsigned count)
+{
+	while (count-- > 0)
+		scif_sercon_putc(*s++);
+
+	scif_sercon_flush();
+}
+
+static int __init scif_sercon_setup(struct console *con, char *options)
+{
+	con->cflag = CREAD | HUPCL | CLOCAL | B115200 | CS8;
+
+	return 0;
+}
+
+static struct console early_console = {
+	.name		= "sercon",
+	.write		= scif_sercon_write,
+	.setup		= scif_sercon_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+};
+
+void scif_sercon_init(int baud)
+{
+	ctrl_outw(0, SCIF_REG + 8);
+	ctrl_outw(0, SCIF_REG);
+
+	/* Set baud rate */
+	ctrl_outb((50000000 / (32 * baud)) - 1, SCIF_REG + 4);
+
+	ctrl_outw(12, SCIF_REG + 24);
+	ctrl_outw(8, SCIF_REG + 24);
+	ctrl_outw(0, SCIF_REG + 32);
+	ctrl_outw(0x60, SCIF_REG + 16);
+	ctrl_outw(0, SCIF_REG + 36);
+	ctrl_outw(0x30, SCIF_REG + 8);
+}
+#endif
+
+void __init enable_early_printk(void)
+{
+#ifdef CONFIG_EARLY_SCIF_CONSOLE
+	scif_sercon_init(115200);
+#endif
+	register_console(&early_console);
+}
+
+void disable_early_printk(void)
+{
+	unregister_console(&early_console);
+}
+
diff --git a/arch/sh/kernel/entry.S b/arch/sh/kernel/entry.S
index dbc33d72656c..05dcc2e01fc1 100644
--- a/arch/sh/kernel/entry.S
+++ b/arch/sh/kernel/entry.S
@@ -1,4 +1,4 @@
-/* $Id: entry.S,v 1.35 2004/02/21 14:45:47 lethal Exp $
+/* $Id: entry.S,v 1.37 2004/06/11 13:02:46 doyu Exp $
  *
  *  linux/arch/sh/entry.S
  *
@@ -77,7 +77,8 @@ EINVAL = 22
 #if defined(CONFIG_CPU_SH3)
 TRA     = 0xffffffd0
 EXPEVT  = 0xffffffd4
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
 INTEVT  = 0xa4000000		! INTEVTE2(0xa4000000)
 #else
 INTEVT  = 0xffffffd8
@@ -1129,6 +1130,14 @@ ENTRY(sys_call_table)
 	.long sys_utimes
  	.long sys_fadvise64_64_wrapper
 	.long sys_ni_syscall	/* Reserved for vserver */
-	.long sys_ni_syscall
+	.long sys_ni_syscall	/* Reserved for mbind */
+	.long sys_ni_syscall	/* 275 - get_mempolicy */
+	.long sys_ni_syscall	/* set_mempolicy */
+	.long sys_mq_open
+	.long sys_mq_unlink
+	.long sys_mq_timedsend
+	.long sys_mq_timedreceive       /* 280 */
+	.long sys_mq_notify
+	.long sys_mq_getsetattr
 
 /* End of entry.S */
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c
index e920a5954788..a911b0149d1f 100644
--- a/arch/sh/kernel/io_generic.c
+++ b/arch/sh/kernel/io_generic.c
@@ -1,4 +1,4 @@
-/* $Id: io_generic.c,v 1.1.1.1.4.2.2.1 2003/01/10 17:26:56 lethal Exp $
+/* $Id: io_generic.c,v 1.2 2003/05/04 19:29:53 lethal Exp $
  *
  * linux/arch/sh/kernel/io_generic.c
  *
@@ -71,16 +71,32 @@ unsigned int generic_inl_p(unsigned long port)
 	return v;
 }
 
+/*
+ * insb/w/l all read a series of bytes/words/longs from a fixed port
+ * address. However as the port address doesn't change we only need to
+ * convert the port address to real address once.
+ */
+
 void generic_insb(unsigned long port, void *buffer, unsigned long count)
 {
+	volatile unsigned char *port_addr;
 	unsigned char *buf=buffer;
-	while(count--) *buf++=inb(port);
+
+	port_addr = (volatile unsigned char *)PORT2ADDR(port);
+
+	while(count--)
+	    *buf++ = *port_addr;
 }
 
 void generic_insw(unsigned long port, void *buffer, unsigned long count)
 {
+	volatile unsigned short *port_addr;
 	unsigned short *buf=buffer;
-	while(count--) *buf++=inw(port);
+
+	port_addr = (volatile unsigned short *)PORT2ADDR(port);
+
+	while(count--)
+	    *buf++ = *port_addr;
 #ifdef SH3_PCMCIA_BUG_WORKAROUND
 	ctrl_inb (DUMMY_READ_AREA6);
 #endif
@@ -88,8 +104,13 @@ void generic_insw(unsigned long port, void *buffer, unsigned long count)
 
 void generic_insl(unsigned long port, void *buffer, unsigned long count)
 {
+	volatile unsigned long *port_addr;
 	unsigned long *buf=buffer;
-	while(count--) *buf++=inl(port);
+
+	port_addr = (volatile unsigned long *)PORT2ADDR(port);
+
+	while(count--)
+	    *buf++ = *port_addr;
 #ifdef SH3_PCMCIA_BUG_WORKAROUND
 	ctrl_inb (DUMMY_READ_AREA6);
 #endif
@@ -128,16 +149,33 @@ void generic_outl_p(unsigned int b, unsigned long port)
 	delay();
 }
 
+/*
+ * outsb/w/l all write a series of bytes/words/longs to a fixed port
+ * address. However as the port address doesn't change we only need to
+ * convert the port address to real address once.
+ */
+
 void generic_outsb(unsigned long port, const void *buffer, unsigned long count)
 {
+	volatile unsigned char *port_addr;
 	const unsigned char *buf=buffer;
-	while(count--) outb(*buf++, port);
+
+	port_addr = (volatile unsigned char *)PORT2ADDR(port);
+
+	while(count--)
+	    *port_addr = *buf++;
 }
 
 void generic_outsw(unsigned long port, const void *buffer, unsigned long count)
 {
+	volatile unsigned short *port_addr;
 	const unsigned short *buf=buffer;
-	while(count--) outw(*buf++, port);
+
+	port_addr = (volatile unsigned short *)PORT2ADDR(port);
+
+	while(count--)
+	    *port_addr = *buf++;
+
 #ifdef SH3_PCMCIA_BUG_WORKAROUND
 	ctrl_inb (DUMMY_READ_AREA6);
 #endif
@@ -145,8 +183,14 @@ void generic_outsw(unsigned long port, const void *buffer, unsigned long count)
 
 void generic_outsl(unsigned long port, const void *buffer, unsigned long count)
 {
+	volatile unsigned long *port_addr;
 	const unsigned long *buf=buffer;
-	while(count--) outl(*buf++, port);
+
+	port_addr = (volatile unsigned long *)PORT2ADDR(port);
+
+	while(count--)
+	    *port_addr = *buf++;
+
 #ifdef SH3_PCMCIA_BUG_WORKAROUND
 	ctrl_inb (DUMMY_READ_AREA6);
 #endif
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index a37e2d1cffce..d78503dd22da 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -436,7 +436,7 @@ int request_irq(unsigned int irq,
 
 	action->handler = handler;
 	action->flags = irqflags;
-	action->mask = 0;
+	cpus_clear(action->mask);
 	action->name = devname;
 	action->next = NULL;
 	action->dev_id = dev_id;
@@ -575,6 +575,49 @@ unsigned long probe_irq_on(void)
 
 EXPORT_SYMBOL(probe_irq_on);
 
+/* Return a mask of triggered interrupts (this
+ * can handle only legacy ISA interrupts).
+ */
+
+/*
+ *	probe_irq_mask - scan a bitmap of interrupt lines
+ *	@val:	mask of interrupts to consider
+ *
+ *	Scan the ISA bus interrupt lines and return a bitmap of
+ *	active interrupts. The interrupt probe logic state is then
+ *	returned to its previous value.
+ *
+ *	Note: we need to scan all the irq's even though we will
+ *	only return ISA irq numbers - just so that we reset them
+ *	all to a known state.
+ */
+unsigned int probe_irq_mask(unsigned long val)
+{
+	int i;
+	unsigned int mask;
+
+	mask = 0;
+	for (i = 0; i < NR_IRQS; i++) {
+		irq_desc_t *desc = irq_desc + i;
+		unsigned int status;
+
+		spin_lock_irq(&desc->lock);
+		status = desc->status;
+
+		if (status & IRQ_AUTODETECT) {
+			if (i < 16 && !(status & IRQ_WAITING))
+				mask |= 1 << i;
+
+			desc->status = status & ~IRQ_AUTODETECT;
+			desc->handler->shutdown(i);
+		}
+		spin_unlock_irq(&desc->lock);
+	}
+	up(&probe_sem);
+
+	return mask & val;
+}
+
 int probe_irq_off(unsigned long val)
 {
 	int i, irq_found, nr_irqs;
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 6b4cb096b11c..8ba6dd300957 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -1,4 +1,4 @@
-/* $Id: process.c,v 1.26 2004/02/06 14:14:14 kkojima Exp $
+/* $Id: process.c,v 1.28 2004/05/05 16:54:23 lethal Exp $
  *
  *  linux/arch/sh/kernel/process.c
  *
@@ -25,6 +25,11 @@
 #include <asm/uaccess.h>
 #include <asm/mmu_context.h>
 #include <asm/elf.h>
+#if defined(CONFIG_SH_HS7751RVOIP)
+#include <asm/hs7751rvoip/hs7751rvoip.h>
+#elif defined(CONFIG_SH_RTS7751R2D)
+#include <asm/rts7751r2d/rts7751r2d.h>
+#endif
 
 static int hlt_counter=0;
 
@@ -50,8 +55,14 @@ void default_idle(void)
 {
 	/* endless idle loop with no priority at all */
 	while (1) {
-		while (!need_resched())
-			cpu_relax();
+		if (hlt_counter) {
+			while (1)
+				if (need_resched())
+					break;
+		} else {
+			while (!need_resched())
+				cpu_sleep();
+		}
 
 		schedule();
 	}
@@ -73,14 +84,30 @@ EXPORT_SYMBOL(machine_restart);
 
 void machine_halt(void)
 {
+#if defined(CONFIG_SH_HS7751RVOIP)
+	unsigned short value;
+
+	value = ctrl_inw(PA_OUTPORTR);
+	ctrl_outw((value & 0xffdf), PA_OUTPORTR);
+#elif defined(CONFIG_SH_RTS7751R2D)
+	ctrl_outw(0x0001, PA_POWOFF);
+#endif
 	while (1)
-		cpu_relax();
+		cpu_sleep();
 }
 
 EXPORT_SYMBOL(machine_halt);
 
 void machine_power_off(void)
 {
+#if defined(CONFIG_SH_HS7751RVOIP)
+	unsigned short value;
+
+	value = ctrl_inw(PA_OUTPORTR);
+	ctrl_outw((value & 0xffdf), PA_OUTPORTR);
+#elif defined(CONFIG_SH_RTS7751R2D)
+	ctrl_outw(0x0001, PA_POWOFF);
+#endif
 }
 
 EXPORT_SYMBOL(machine_power_off);
diff --git a/arch/sh/kernel/ptrace.c b/arch/sh/kernel/ptrace.c
index 602f6c570be6..017826912cc5 100644
--- a/arch/sh/kernel/ptrace.c
+++ b/arch/sh/kernel/ptrace.c
@@ -1,4 +1,4 @@
-/* $Id: ptrace.c,v 1.14 2003/11/28 23:05:43 kkojima Exp $
+/* $Id: ptrace.c,v 1.15 2004/05/07 05:32:05 sugioka Exp $
  *
  * linux/arch/sh/kernel/ptrace.c
  *
@@ -255,13 +255,6 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
 		ret = ptrace_detach(child, data);
 		break;
 
-	case PTRACE_SETOPTIONS:
-		if (data & PTRACE_O_TRACESYSGOOD)
-			child->ptrace |= PT_TRACESYSGOOD;
-		else
-			child->ptrace &= ~PT_TRACESYSGOOD;
-		ret = 0;
-		break;
 #ifdef CONFIG_SH_DSP
 	case PTRACE_GETDSPREGS: {
 		unsigned long dp;
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 574ac24f8e51..7746f7c5e714 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -25,15 +25,12 @@
 #include <asm/io_generic.h>
 #include <asm/sections.h>
 #include <asm/irq.h>
-#ifdef CONFIG_SH_EARLY_PRINTK
-#include <asm/sh_bios.h>
-#endif
 
 #ifdef CONFIG_SH_KGDB
 #include <asm/kgdb.h>
 static int kgdb_parse_options(char *options);
 #endif
-
+extern void * __rd_start, * __rd_end;
 /*
  * Machine setup..
  */
@@ -85,14 +82,12 @@ static struct sh_machine_vector* __init get_mv_byname(const char* name);
 #define INITRD_SIZE (*(unsigned long *) (PARAM+0x014))
 /* ... */
 #define COMMAND_LINE ((char *) (PARAM+0x100))
-#define COMMAND_LINE_SIZE 256
 
 #define RAMDISK_IMAGE_START_MASK  	0x07FF
 #define RAMDISK_PROMPT_FLAG		0x8000
 #define RAMDISK_LOAD_FLAG		0x4000	
 
 static char command_line[COMMAND_LINE_SIZE] = { 0, };
-       char saved_command_line[COMMAND_LINE_SIZE];
 
 struct resource standard_io_resources[] = {
 	{ "dma1", 0x00, 0x1f },
@@ -120,130 +115,6 @@ static struct resource ram_resources[] = {
 
 unsigned long memory_start, memory_end;
 
-/* XXX: MRB-remove - blatant hack */
-#if 1
-#define SCIF_REG	0xffe80000
-
-static void scif_sercon_putc(int c)
-{
-	while (!(ctrl_inw(SCIF_REG + 0x10) & 0x20)) ;
-
-	ctrl_outb(c, SCIF_REG + 12);
-	ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0x9f), SCIF_REG + 0x10);
-
-	if (c == '\n')
-		scif_sercon_putc('\r');
-}
-
-static void scif_sercon_flush(void)
-{
-	ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10);
-
-	while (!(ctrl_inw(SCIF_REG + 0x10) & 0x40)) ;
-
-	ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10);
-}
-
-static void scif_sercon_write(struct console *con, const char *s, unsigned count)
-{
-	while (count-- > 0)
-		scif_sercon_putc(*s++);
-
-	scif_sercon_flush();
-}
-
-static int __init scif_sercon_setup(struct console *con, char *options)
-{
-	con->cflag = CREAD | HUPCL | CLOCAL | B57600 | CS8;
-
-	return 0;
-}
-
-static struct console scif_sercon = {
-	.name		= "sercon",
-	.write		= scif_sercon_write,
-	.setup		= scif_sercon_setup,
-	.flags		= CON_PRINTBUFFER,
-	.index		= -1,
-};
-
-void scif_sercon_init(int baud)
-{
-	ctrl_outw(0, SCIF_REG + 8);
-	ctrl_outw(0, SCIF_REG);
-
-	/* Set baud rate */
-	ctrl_outb((50000000 / (32 * baud)) - 1, SCIF_REG + 4);
-
-	ctrl_outw(12, SCIF_REG + 24);
-	ctrl_outw(8, SCIF_REG + 24);
-	ctrl_outw(0, SCIF_REG + 32);
-	ctrl_outw(0x60, SCIF_REG + 16);
-	ctrl_outw(0, SCIF_REG + 36);
-	ctrl_outw(0x30, SCIF_REG + 8);
-
-	register_console(&scif_sercon);
-}
-
-void scif_sercon_unregister(void)
-{
-	unregister_console(&scif_sercon);
-}
-#endif
-
-#ifdef CONFIG_SH_EARLY_PRINTK
-/*
- *	Print a string through the BIOS
- */
-static void sh_console_write(struct console *co, const char *s,
-				 unsigned count)
-{
-    	sh_bios_console_write(s, count);
-}
-
-/*
- *	Setup initial baud/bits/parity. We do two things here:
- *	- construct a cflag setting for the first rs_open()
- *	- initialize the serial port
- *	Return non-zero if we didn't find a serial port.
- */
-static int __init sh_console_setup(struct console *co, char *options)
-{
-	int	cflag = CREAD | HUPCL | CLOCAL;
-
-	/*
-	 *	Now construct a cflag setting.
-	 *  	TODO: this is a totally bogus cflag, as we have
-	 *  	no idea what serial settings the BIOS is using, or
-	 *  	even if its using the serial port at all.
-	 */
-    	cflag |= B115200 | CS8 | /*no parity*/0;
-
-	co->cflag = cflag;
-
-	return 0;
-}
-
-static struct console sh_console = {
-	.name		= "bios",
-	.write		= sh_console_write,
-	.setup		= sh_console_setup,
-	.flags		= CON_PRINTBUFFER,
-	.index		= -1,
-};
-
-void sh_console_init(void)
-{
-	register_console(&sh_console);
-}
-
-void sh_console_unregister(void)
-{
-	unregister_console(&sh_console);
-}
-
-#endif
-
 static inline void parse_cmdline (char ** cmdline_p, char mv_name[MV_NAME_SIZE],
 				  struct sh_machine_vector** mvp,
 				  unsigned long *mv_io_base,
@@ -325,10 +196,6 @@ static int __init sh_mv_setup(char **cmdline_p)
 
 	parse_cmdline(cmdline_p, mv_name, &mv, &mv_io_base, &mv_mmio_enable);
 
-#ifdef CONFIG_CMDLINE_BOOL
-        sprintf(*cmdline_p, CONFIG_CMDLINE);
-#endif
-
 #ifdef CONFIG_SH_GENERIC
 	if (mv == NULL) {
 		mv = &mv_unknown;
@@ -382,14 +249,15 @@ void __init setup_arch(char **cmdline_p)
 	unsigned long bootmap_size;
 	unsigned long start_pfn, max_pfn, max_low_pfn;
 
-/* XXX: MRB-remove */
-#if 0
-	scif_sercon_init(57600);
+#ifdef CONFIG_EARLY_PRINTK
+	extern void enable_early_printk(void);
+
+	enable_early_printk();
 #endif
-#ifdef CONFIG_SH_EARLY_PRINTK
-	sh_console_init();
+#ifdef CONFIG_CMDLINE_BOOL
+        strcpy(COMMAND_LINE, CONFIG_CMDLINE);
 #endif
-	
+
 	ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
 
 #ifdef CONFIG_BLK_DEV_RAM
@@ -492,6 +360,13 @@ void __init setup_arch(char **cmdline_p)
 	reserve_bootmem_node(NODE_DATA(0), __MEMORY_START, PAGE_SIZE);
 
 #ifdef CONFIG_BLK_DEV_INITRD
+ 	ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
+ 	if (&__rd_start != &__rd_end) {
+		LOADER_TYPE = 1;
+		INITRD_START = PHYSADDR((unsigned long)&__rd_start) - __MEMORY_START;
+		INITRD_SIZE = (unsigned long)&__rd_end - (unsigned long)&__rd_start;
+ 	}
+
 	if (LOADER_TYPE && INITRD_START) {
 		if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) {
 			reserve_bootmem_node(NODE_DATA(0), INITRD_START+__MEMORY_START, INITRD_SIZE);
@@ -557,8 +432,10 @@ subsys_initcall(topology_init);
 
 static const char *cpu_name[] = {
 	[CPU_SH7604]	= "SH7604",
+	[CPU_SH7705]	= "SH7705",
 	[CPU_SH7708]	= "SH7708",
 	[CPU_SH7729]	= "SH7729",
+	[CPU_SH7300]	= "SH7300",
 	[CPU_SH7750]	= "SH7750",
 	[CPU_SH7750S]	= "SH7750S",
 	[CPU_SH7750R]	= "SH7750R",
@@ -595,8 +472,8 @@ static void show_cpuflags(struct seq_file *m)
 
 	for (i = 0; i < cpu_data->flags; i++)
 		if ((cpu_data->flags & (1 << i)))
-			seq_printf(m, " %s", cpu_flags[i]);
-	
+			seq_printf(m, " %s", cpu_flags[i+1]);
+
 	seq_printf(m, "\n");
 }
 
diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c
index abe649077f7b..42868fca481a 100644
--- a/arch/sh/kernel/sh_ksyms.c
+++ b/arch/sh/kernel/sh_ksyms.c
@@ -33,6 +33,7 @@ EXPORT_SYMBOL(dump_fpu);
 EXPORT_SYMBOL(iounmap);
 EXPORT_SYMBOL(enable_irq);
 EXPORT_SYMBOL(disable_irq);
+EXPORT_SYMBOL(probe_irq_mask);
 EXPORT_SYMBOL(kernel_thread);
 EXPORT_SYMBOL(disable_irq_nosync);
 EXPORT_SYMBOL(irq_desc);
@@ -83,6 +84,7 @@ EXPORT_SYMBOL(__down);
 EXPORT_SYMBOL(__down_interruptible);
 
 EXPORT_SYMBOL(__udelay);
+EXPORT_SYMBOL(__ndelay);
 EXPORT_SYMBOL(__const_udelay);
 
 #define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL_NOVERS(name)
@@ -100,6 +102,7 @@ DECLARE_EXPORT(__movstr);
  
 DECLARE_EXPORT(__movstr_i4_even);
 DECLARE_EXPORT(__movstr_i4_odd);
+DECLARE_EXPORT(__movstrSI12_i4);
 
 /* needed by some modules */
 EXPORT_SYMBOL(flush_cache_all);
@@ -115,3 +118,4 @@ EXPORT_SYMBOL(synchronize_irq);
 #endif
 
 EXPORT_SYMBOL(csum_partial);
+EXPORT_SYMBOL(consistent_sync);
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index cd91a59a9fff..3bcdf4ca405d 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -1,10 +1,10 @@
-/* $Id: time.c,v 1.19 2004/02/27 00:40:48 lethal Exp $
+/* $Id: time.c,v 1.21 2004/04/21 00:09:15 lethal Exp $
  *
  *  linux/arch/sh/kernel/time.c
  *
  *  Copyright (C) 1999  Tetsuya Okada & Niibe Yutaka
  *  Copyright (C) 2000  Philipp Rumpf <prumpf@tux.org>
- *  Copyright (C) 2002, 2003  Paul Mundt
+ *  Copyright (C) 2002, 2003, 2004  Paul Mundt
  *  Copyright (C) 2002  M. R. Brown  <mrbrown@linux-sh.org>
  *
  *  Some code taken from i386 version.
@@ -47,12 +47,26 @@
 #define TMU0_TCR_CALIB	0x0000
 
 #if defined(CONFIG_CPU_SH3)
+#if defined(CONFIG_CPU_SUBTYPE_SH7300)
+#define TMU_TSTR        0xA412FE92      /* Byte access */
+
+#define TMU0_TCOR       0xA412FE94      /* Long access */
+#define TMU0_TCNT       0xA412FE98      /* Long access */
+#define TMU0_TCR        0xA412FE9C      /* Word access */
+
+#define TMU1_TCOR	0xA412FEA0	/* Long access */
+#define TMU1_TCNT	0xA412FEA4	/* Long access */
+#define TMU1_TCR	0xA412FEA8	/* Word access */
+
+#define FRQCR           0xA415FF80
+#else
 #define TMU_TOCR	0xfffffe90	/* Byte access */
 #define TMU_TSTR	0xfffffe92	/* Byte access */
 
 #define TMU0_TCOR	0xfffffe94	/* Long access */
 #define TMU0_TCNT	0xfffffe98	/* Long access */
 #define TMU0_TCR	0xfffffe9c	/* Word access */
+#endif
 #elif defined(CONFIG_CPU_SH4)
 #define TMU_TOCR	0xffd80000	/* Byte access */
 #define TMU_TSTR	0xffd80004	/* Byte access */
@@ -85,6 +99,9 @@ void (*rtc_get_time)(struct timespec *) = 0;
 int (*rtc_set_time)(const time_t) = 0;
 #endif
 
+#if defined(CONFIG_CPU_SUBTYPE_SH7300)
+static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 };
+#endif
 #if defined(CONFIG_CPU_SH3)
 static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
 static int stc_values[]      = { 0, 1, 4, 2, 5, 0, 0, 0 };
@@ -337,7 +354,9 @@ static unsigned int __init get_timer_frequency(void)
 	 * have it count down at its natural rate.
 	 */
 	ctrl_outb(0, TMU_TSTR);
+#if !defined(CONFIG_CPU_SUBTYPE_SH7300)
 	ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
+#endif
 	ctrl_outw(TMU0_TCR_CALIB, TMU0_TCR);
 	ctrl_outl(0xffffffff, TMU0_TCOR);
 	ctrl_outl(0xffffffff, TMU0_TCNT);
@@ -391,13 +410,22 @@ static int __init sh_pclk_setup(char *str)
 }
 __setup("sh_pclk=", sh_pclk_setup);
 
-static struct irqaction irq0  = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL};
+static struct irqaction irq0  = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL};
 
 void get_current_frequency_divisors(unsigned int *ifc, unsigned int *bfc, unsigned int *pfc)
 {
 	unsigned int frqcr = ctrl_inw(FRQCR);
 
 #if defined(CONFIG_CPU_SH3)
+#if defined(CONFIG_CPU_SUBTYPE_SH7300)
+	*ifc = md_table[((frqcr & 0x0070) >> 4)];
+	*bfc = md_table[((frqcr & 0x0700) >> 8)];
+	*pfc = md_table[frqcr & 0x0007];
+#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
+	*bfc = stc_multipliers[(frqcr & 0x0300) >> 8];
+	*ifc = ifc_divisors[(frqcr & 0x0030) >> 4];
+	*pfc = pfc_divisors[frqcr & 0x0003];
+#else
 	unsigned int tmp;
 
 	tmp  = (frqcr & 0x8000) >> 13;
@@ -409,6 +437,7 @@ void get_current_frequency_divisors(unsigned int *ifc, unsigned int *bfc, unsign
 	tmp  = (frqcr & 0x2000) >> 11;
 	tmp |= frqcr & 0x0003;
 	*pfc = pfc_divisors[tmp];
+#endif
 #elif defined(CONFIG_CPU_SH4)
 	*ifc = ifc_divisors[(frqcr >> 6) & 0x0007];
 	*bfc = bfc_divisors[(frqcr >> 3) & 0x0007];
@@ -431,26 +460,139 @@ _FREQ_TABLE(ifc);
 _FREQ_TABLE(bfc);
 _FREQ_TABLE(pfc);
 
+#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
+
+/* The ST40 divisors are totally different so we set the cpu data
+** clocks using a different algorithm
+**
+** I've just plugged this from the 2.4 code - Alex Bennee <kernel-hacker@bennee.com>
+*/
+#define CCN_PVR_CHIP_SHIFT 24
+#define CCN_PVR_CHIP_MASK  0xff
+#define CCN_PVR_CHIP_ST40STB1 0x4
+
+
+struct frqcr_data {
+    unsigned short frqcr;
+    struct {
+	unsigned char multiplier;
+	unsigned char divisor;
+    } factor[3];
+};
+
+static struct frqcr_data st40_frqcr_table[] = {
+    { 0x000, {{1,1}, {1,1}, {1,2}}},
+    { 0x002, {{1,1}, {1,1}, {1,4}}},
+    { 0x004, {{1,1}, {1,1}, {1,8}}},
+    { 0x008, {{1,1}, {1,2}, {1,2}}},
+    { 0x00A, {{1,1}, {1,2}, {1,4}}},
+    { 0x00C, {{1,1}, {1,2}, {1,8}}},
+    { 0x011, {{1,1}, {2,3}, {1,6}}},
+    { 0x013, {{1,1}, {2,3}, {1,3}}},
+    { 0x01A, {{1,1}, {1,2}, {1,4}}},
+    { 0x01C, {{1,1}, {1,2}, {1,8}}},
+    { 0x023, {{1,1}, {2,3}, {1,3}}},
+    { 0x02C, {{1,1}, {1,2}, {1,8}}},
+    { 0x048, {{1,2}, {1,2}, {1,4}}},
+    { 0x04A, {{1,2}, {1,2}, {1,6}}},
+    { 0x04C, {{1,2}, {1,2}, {1,8}}},
+    { 0x05A, {{1,2}, {1,3}, {1,6}}},
+    { 0x05C, {{1,2}, {1,3}, {1,6}}},
+    { 0x063, {{1,2}, {1,4}, {1,4}}},
+    { 0x06C, {{1,2}, {1,4}, {1,8}}},
+    { 0x091, {{1,3}, {1,3}, {1,6}}},
+    { 0x093, {{1,3}, {1,3}, {1,6}}},
+    { 0x0A3, {{1,3}, {1,6}, {1,6}}},
+    { 0x0DA, {{1,4}, {1,4}, {1,8}}},
+    { 0x0DC, {{1,4}, {1,4}, {1,8}}},
+    { 0x0EC, {{1,4}, {1,8}, {1,8}}},
+    { 0x123, {{1,4}, {1,4}, {1,8}}},
+    { 0x16C, {{1,4}, {1,8}, {1,8}}},
+};
+
+struct memclk_data {
+    unsigned char multiplier;
+    unsigned char divisor;
+};
+static struct memclk_data st40_memclk_table[8] = {
+    {1,1},	// 000
+    {1,2},	// 001
+    {1,3},	// 010
+    {2,3},	// 011
+    {1,4},	// 100
+    {1,6},	// 101
+    {1,8},	// 110
+    {1,8}	// 111
+};
+
+static void st40_specific_time_init(unsigned int module_clock, unsigned short frqcr)
+{
+    unsigned int cpu_clock, master_clock, bus_clock, memory_clock;
+    struct frqcr_data *d;
+    int a;
+    unsigned long memclkcr;
+    struct memclk_data *e;
+
+    for (a=0; a<ARRAY_SIZE(st40_frqcr_table); a++) {
+	d = &st40_frqcr_table[a];
+	if (d->frqcr == (frqcr & 0x1ff))
+	    break;
+    }
+    if (a == ARRAY_SIZE(st40_frqcr_table)) {
+	d = st40_frqcr_table;
+	printk("ERROR: Unrecognised FRQCR value (0x%x), using default multipliers\n",frqcr);
+    }
+
+    memclkcr = ctrl_inl(CLOCKGEN_MEMCLKCR);
+    e = &st40_memclk_table[memclkcr & MEMCLKCR_RATIO_MASK];
+
+    printk("Clock multipliers: CPU: %d/%d Bus: %d/%d Mem: %d/%d Periph: %d/%d\n",
+	    d->factor[0].multiplier, d->factor[0].divisor,
+	    d->factor[1].multiplier, d->factor[1].divisor,
+	    e->multiplier,           e->divisor,
+	    d->factor[2].multiplier, d->factor[2].divisor);
+
+    master_clock = module_clock * d->factor[2].divisor    / d->factor[2].multiplier;
+    bus_clock    = master_clock * d->factor[1].multiplier / d->factor[1].divisor;
+    memory_clock = master_clock * e->multiplier           / e->divisor;
+    cpu_clock    = master_clock * d->factor[0].multiplier / d->factor[0].divisor;
+
+    current_cpu_data.cpu_clock    = cpu_clock;
+    current_cpu_data.master_clock = master_clock;
+    current_cpu_data.bus_clock    = bus_clock;
+    current_cpu_data.memory_clock = memory_clock;
+    current_cpu_data.module_clock = module_clock;
+
+}
+
+#endif
+
 void __init time_init(void)
 {
 	unsigned int timer_freq = 0;
 	unsigned int ifc, pfc, bfc;
 	unsigned long interval;
+#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
+	unsigned long pvr;
+	unsigned short frqcr;
+#endif
 
 	if (board_time_init)
 		board_time_init();
 
-	get_current_frequency_divisors(&ifc, &bfc, &pfc);
 
 	/*
 	 * If we don't have an RTC (such as with the SH7300), don't attempt to
 	 * probe the timer frequency. Rely on an either hardcoded peripheral
-	 * clock value, or on the sh_pclk command line option.
+	 * clock value, or on the sh_pclk command line option. Note that we
+	 * still need to have CONFIG_SH_PCLK_FREQ set in order for things like
+	 * CLOCK_TICK_RATE to be sane.
 	 */
 	current_cpu_data.module_clock = sh_pclk_freq;
 
+#ifdef CONFIG_SH_PCLK_CALC
 	/* XXX: Switch this over to a more generic test. */
-	if (current_cpu_data.type != CPU_SH7300) {
+	{
 		unsigned int freq;
 
 		/* 
@@ -466,15 +608,31 @@ void __init time_init(void)
 		timer_freq = get_timer_frequency();
 		freq = timer_freq * 4;
 
-		if (sh_pclk_freq && sh_pclk_freq != freq) {
+		if (sh_pclk_freq && (sh_pclk_freq/100*99 > freq || sh_pclk_freq/100*101 < freq)) {
 			printk(KERN_NOTICE "Calculated peripheral clock value "
 			       "%d differs from sh_pclk value %d, fixing..\n",
 			       freq, sh_pclk_freq);
 			current_cpu_data.module_clock = freq;
 		}
 	}
+#endif
+
+#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
+	pvr = ctrl_inl(CCN_PVR);
+	frqcr = ctrl_inw(FRQCR);
+	printk("time.c ST40 Probe: PVR %08lx, FRQCR %04hx\n", pvr, frqcr);
+	if (((pvr >>CCN_PVR_CHIP_SHIFT) & CCN_PVR_CHIP_MASK) == CCN_PVR_CHIP_ST40STB1)
+	    st40_specific_time_init(current_cpu_data.module_clock, frqcr);
+	else
+#endif
+	    get_current_frequency_divisors(&ifc, &bfc, &pfc);
 
-	rtc_get_time(&xtime);
+	if (rtc_get_time)
+		rtc_get_time(&xtime);
+	else {
+         	xtime.tv_sec = mktime(2000, 1, 1, 0, 0, 0);
+         	xtime.tv_nsec = 0;
+	}
 
         set_normalized_timespec(&wall_to_monotonic,
                                 -xtime.tv_sec, -xtime.tv_nsec);
@@ -485,6 +643,10 @@ void __init time_init(void)
 		setup_irq(TIMER_IRQ, &irq0);
 	}
 
+	/*
+	** for ST40 chips the current_cpu_data should already be set
+	** so not having valid pfc/bfc/ifc shouldn't be a problem
+	*/
 	if (!current_cpu_data.master_clock)
 		current_cpu_data.master_clock = current_cpu_data.module_clock * pfc;
 	if (!current_cpu_data.bus_clock)
@@ -506,13 +668,19 @@ void __init time_init(void)
 	printk("Module clock: %d.%02dMHz\n",
 	       (current_cpu_data.module_clock / 1000000),
 	       (current_cpu_data.module_clock % 1000000)/10000);
+#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D)
+	interval = ((current_cpu_data.module_clock/4 + HZ/2) / HZ) - 1;
+#else
 	interval = (current_cpu_data.module_clock/4 + HZ/2) / HZ;
+#endif
 
 	printk("Interval = %ld\n", interval);
 
 	/* Start TMU0 */
 	ctrl_outb(0, TMU_TSTR);
+#if !defined(CONFIG_CPU_SUBTYPE_SH7300)
 	ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
+#endif
 	ctrl_outw(TMU0_TCR_INIT, TMU0_TCR);
 	ctrl_outl(interval, TMU0_TCOR);
 	ctrl_outl(interval, TMU0_TCNT);
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index 3e63d8a70ed3..da5721f4aab7 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -1,4 +1,4 @@
-/* $Id: traps.c,v 1.16 2004/03/16 00:10:54 lethal Exp $
+/* $Id: traps.c,v 1.17 2004/05/02 01:46:30 sugioka Exp $
  *
  *  linux/arch/sh/traps.c
  *
@@ -559,7 +559,7 @@ int is_dsp_inst(struct pt_regs *regs)
 	 * Safe guard if DSP mode is already enabled or we're lacking
 	 * the DSP altogether.
 	 */
-	if (!test_bit(CPU_HAS_DSP, &(cpu_data->flags)) || (regs->sr & SR_DSP))
+	if (!(cpu_data->flags & CPU_HAS_DSP) || (regs->sr & SR_DSP))
 		return 0;
 
 	get_user(inst, ((unsigned short *) regs->pc));
@@ -636,7 +636,7 @@ void __init trap_init(void)
 		= (void *)do_illegal_slot_inst;
 
 #ifdef CONFIG_CPU_SH4
-	if (!test_bit(CPU_HAS_FPU, &(cpu_data->flags))) {
+	if (!(cpu_data->flags & CPU_HAS_FPU)) {
 		/* For SH-4 lacking an FPU, treat floating point instructions
 		   as reserved. */
 		/* entry 64 corresponds to EXPEVT=0x800 */
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index da0f5d728b3e..92398074128c 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -38,6 +38,14 @@ SECTIONS
 
   .data : {			/* Data */
 	*(.data)
+
+ 	 /* Align the initial ramdisk image (INITRD) on page boundaries. */
+ 	 . = ALIGN(4096);
+ 	 __rd_start = .;
+ 	 *(.initrd)
+ 	 . = ALIGN(4096);
+ 	 __rd_end = .;
+
 	CONSTRUCTORS
 	}
 
diff --git a/arch/sh/lib/delay.c b/arch/sh/lib/delay.c
index e1fcc970f0e2..5504546494c8 100644
--- a/arch/sh/lib/delay.c
+++ b/arch/sh/lib/delay.c
@@ -33,3 +33,9 @@ void __udelay(unsigned long usecs)
 {
 	__const_udelay(usecs * 0x000010c6);  /* 2**32 / 1000000 */
 }
+
+void __ndelay(unsigned long nsecs)
+{
+	__const_udelay(nsecs * 0x00000005);
+}
+
diff --git a/arch/sh/mm/cache-sh3.c b/arch/sh/mm/cache-sh3.c
index cb6c0c0c7d56..b03d5e441029 100644
--- a/arch/sh/mm/cache-sh3.c
+++ b/arch/sh/mm/cache-sh3.c
@@ -1,4 +1,4 @@
-/* $Id: cache-sh3.c,v 1.8 2004/02/01 16:26:27 lethal Exp $
+/* $Id: cache-sh3.c,v 1.9 2004/05/02 01:46:30 sugioka Exp $
  *
  *  linux/arch/sh/mm/cache-sh3.c
  *
@@ -65,14 +65,14 @@ int __init detect_cpu_and_cache_system(void)
 	 * 2K(direct) 7702 is not supported (yet)
 	 */
 	if (data0 == data1 && data2 == data3) {	/* Shadow */
-		cpu_data->dcache.way_shift	= 11;
+		cpu_data->dcache.way_incr	= (1 << 11);
 		cpu_data->dcache.entry_mask	= 0x7f0;
 		cpu_data->dcache.sets		= 128;
 		cpu_data->type = CPU_SH7708;
 
-		set_bit(CPU_HAS_MMU_PAGE_ASSOC, &(cpu_data->flags));
+		cpu_data->flags |= CPU_HAS_MMU_PAGE_ASSOC;
 	} else {				/* 7709A or 7729  */
-		cpu_data->dcache.way_shift	= 12;
+		cpu_data->dcache.way_incr	= (1 << 12);
 		cpu_data->dcache.entry_mask	= 0xff0;
 		cpu_data->dcache.sets		= 256;
 		cpu_data->type = CPU_SH7729;
@@ -108,13 +108,12 @@ void __flush_wback_region(void *start, int size)
 		& ~(L1_CACHE_BYTES-1);
 
 	for (v = begin; v < end; v+=L1_CACHE_BYTES) {
+		unsigned long addrstart = CACHE_OC_ADDRESS_ARRAY;
 		for (j = 0; j < cpu_data->dcache.ways; j++) {
 			unsigned long data, addr, p;
 
 			p = __pa(v);
-			addr = CACHE_OC_ADDRESS_ARRAY |
-				(j << cpu_data->dcache.way_shift)|
-				(v & cpu_data->dcache.entry_mask);
+			addr = addrstart | (v & cpu_data->dcache.entry_mask);
 			local_irq_save(flags);
 			data = ctrl_inl(addr);
 			
@@ -126,6 +125,7 @@ void __flush_wback_region(void *start, int size)
 				break;
 			}
 			local_irq_restore(flags);
+			addrstart += cpu_data->dcache.way_incr;
 		}
 	}
 }
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index dde3de346fab..adb99d833d23 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -30,7 +30,7 @@ static void __flush_dcache_all_ex(void);
 
 int __init detect_cpu_and_cache_system(void)
 {
-	unsigned long pvr, prr, ccr, cvr;
+	unsigned long pvr, prr, cvr;
 	unsigned long size;
 
 	static unsigned long sizes[16] = {
@@ -48,7 +48,7 @@ int __init detect_cpu_and_cache_system(void)
 	/*
 	 * Setup some sane SH-4 defaults for the icache
 	 */
-	cpu_data->icache.way_shift	= 13;
+	cpu_data->icache.way_incr	= (1 << 13);
 	cpu_data->icache.entry_shift	= 5;
 	cpu_data->icache.entry_mask	= 0x1fe0;
 	cpu_data->icache.sets		= 256;
@@ -58,7 +58,7 @@ int __init detect_cpu_and_cache_system(void)
 	/*
 	 * And again for the dcache ..
 	 */
-	cpu_data->dcache.way_shift	= 14;
+	cpu_data->dcache.way_incr	= (1 << 14);
 	cpu_data->dcache.entry_shift	= 5;
 	cpu_data->dcache.entry_mask	= 0x3fe0;
 	cpu_data->dcache.sets		= 512;
@@ -66,7 +66,7 @@ int __init detect_cpu_and_cache_system(void)
 	cpu_data->dcache.linesz		= L1_CACHE_BYTES;
 
 	/* Set the FPU flag, virtually all SH-4's have one */
-	set_bit(CPU_HAS_FPU, &(cpu_data->flags));
+	cpu_data->flags |= CPU_HAS_FPU;
 
 	/*
 	 * Probe the underlying processor version/revision and
@@ -75,7 +75,7 @@ int __init detect_cpu_and_cache_system(void)
 	switch (pvr) {
 	case 0x205:
 		cpu_data->type = CPU_SH7750;
-		set_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags));
+		cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG;
 		break;
 	case 0x206:
 		cpu_data->type = CPU_SH7750S;
@@ -84,7 +84,7 @@ int __init detect_cpu_and_cache_system(void)
 		 * FIXME: This is needed for 7750, but do we need it for the
 		 * 7750S too? For now, assume we do.. -- PFM
 		 */
-		set_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags));
+		cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG;
 
 		break;
 	case 0x1100:
@@ -102,7 +102,7 @@ int __init detect_cpu_and_cache_system(void)
 		cpu_data->dcache.ways = 2;
 
 		/* No FPU on the SH4-500 series.. */
-		clear_bit(CPU_HAS_FPU, &(cpu_data->flags));
+		cpu_data->flags &= ~CPU_HAS_FPU;
 		break;
 	case 0x600:
 		cpu_data->type = CPU_SH4_202;
@@ -129,27 +129,20 @@ int __init detect_cpu_and_cache_system(void)
 	 * On anything that's not a direct-mapped cache, look to the CVR
 	 * for I/D-cache specifics.
 	 */
-	if (cpu_data->dcache.ways > 1) {
-		jump_to_P2();
-		ccr = ctrl_inl(CCR);
-
-		/* Force EMODE */
-		if (!(ccr & CCR_CACHE_EMODE)) {
-			ccr |= CCR_CACHE_EMODE;
-			ctrl_outl(ccr, CCR);
-		}
-
-		back_to_P1();
-
+	if (cpu_data->icache.ways > 1) {
 		size = sizes[(cvr >> 20) & 0xf];
-		cpu_data->icache.way_shift	=  (size >> 1);
-		cpu_data->icache.entry_mask	= ((size >> 2) - (1 << 5));
-		cpu_data->icache.sets		=  (size >> 6);
+		cpu_data->icache.way_incr	= size / cpu_data->icache.ways;
+		cpu_data->icache.sets		= (size >> 6);
+		cpu_data->icache.entry_mask	=
+			((size / cpu_data->icache.ways) - (1 << 5));
+	}
 
+	if (cpu_data->dcache.ways > 1) {
 		size = sizes[(cvr >> 16) & 0xf];
-		cpu_data->dcache.way_shift	=  (size >> 1);
-		cpu_data->dcache.entry_mask	= ((size >> 2) - (1 << 5));
-		cpu_data->dcache.sets		=  (size >> 6);
+		cpu_data->dcache.way_incr	= size / cpu_data->dcache.ways;
+		cpu_data->dcache.sets		= (size >> 6);
+		cpu_data->dcache.entry_mask	=
+			((size / cpu_data->dcache.ways) - (1 << 5));
 	}
 
 	return 0;
@@ -250,7 +243,7 @@ static void __flush_cache_4096_all_ex(unsigned long start)
 	int i;
 
 	entry_offset = 1 << cpu_data->dcache.entry_shift;
-	for (i = 0; i < cpu_data->dcache.ways; i++, start += (1 << cpu_data->dcache.way_shift)) {
+	for (i = 0; i < cpu_data->dcache.ways; i++, start += cpu_data->dcache.way_incr) {
 		for (addr = CACHE_OC_ADDRESS_ARRAY + start;
 		     addr < CACHE_OC_ADDRESS_ARRAY + 4096 + start;
 		     addr += entry_offset) {
@@ -297,7 +290,7 @@ void flush_cache_sigtramp(unsigned long addr)
 
 	local_irq_save(flags);
 	jump_to_P2();
-	for(i = 0; i < cpu_data->icache.ways; i++, index += (1 << cpu_data->icache.way_shift))
+	for(i = 0; i < cpu_data->icache.ways; i++, index += cpu_data->icache.way_incr)
 		ctrl_outl(0, index);	/* Clear out Valid-bit */
 	back_to_P1();
 	local_irq_restore(flags);
@@ -313,12 +306,13 @@ static inline void flush_cache_4096(unsigned long start,
 	 * SH7751, SH7751R, and ST40 have no restriction to handle cache.
 	 * (While SH7750 must do that at P2 area.)
 	 */
-	if (test_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags))) {
+	if ((cpu_data->flags & CPU_HAS_P2_FLUSH_BUG)
+	   || start < CACHE_OC_ADDRESS_ARRAY) {
 		local_irq_save(flags);
-		__flush_cache_4096(start | SH_CACHE_ASSOC, phys | 0x80000000, 0x20000000);
+		__flush_cache_4096(start | SH_CACHE_ASSOC, P1SEGADDR(phys), 0x20000000);
 		local_irq_restore(flags);
-	} else if (start >= CACHE_OC_ADDRESS_ARRAY) {
-		__flush_cache_4096(start | SH_CACHE_ASSOC, phys | 0x80000000, 0);
+	} else {
+		__flush_cache_4096(start | SH_CACHE_ASSOC, P1SEGADDR(phys), 0);
 	}
 }
 
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index f988035c7c86..789bacf1a7aa 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -24,56 +24,58 @@ void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle)
 	if (!page)
 		return NULL;
 
-	ret = (void *)P2SEGADDR(page_to_bus(page));
+	ret = page_address(page);
+	*handle = virt_to_phys(ret);
 
 	/*
 	 * We must flush the cache before we pass it on to the device
 	 */
 	dma_cache_wback_inv(ret, size);
 
-	*handle = (unsigned long)ret;
-
+	page = virt_to_page(ret);
 	free = page + (size >> PAGE_SHIFT);
 	end  = page + (1 << order);
 
-	do {
+	while (++page < end) {
 		set_page_count(page, 1);
-		page++;
-	} while (size -= PAGE_SIZE);
 
-	/*
-	 * Free any unused pages
-	 */
-	while (page < end) {
-		set_page_count(page, 1);
-		__free_page(page);
-		page++;
+		/* Free any unused pages */
+		if (page >= free) {
+			__free_page(page);
+		}
 	}
 
-	return ret;
+	return P2SEGADDR(ret);
 }
 
 void consistent_free(void *vaddr, size_t size)
 {
 	unsigned long addr = P1SEGADDR((unsigned long)vaddr);
+	struct page *page=virt_to_page(addr);
+	int num_pages=(size+PAGE_SIZE-1) >> PAGE_SHIFT;
+	int i;
 
-	free_pages(addr, get_order(size));
+	for(i=0;i<num_pages;i++) {
+		__free_page((page+i));
+	}
 }
 
 void consistent_sync(void *vaddr, size_t size, int direction)
 {
+	void * p1addr = (void*) P1SEGADDR((unsigned long)vaddr);
+
 	switch (direction) {
 	case DMA_FROM_DEVICE:		/* invalidate only */
-		dma_cache_inv(vaddr, size);
+		dma_cache_inv(p1addr, size);
 		break;
 	case DMA_TO_DEVICE:		/* writeback only */
-		dma_cache_wback(vaddr, size);
+		dma_cache_wback(p1addr, size);
 		break;
 	case DMA_BIDIRECTIONAL:		/* writeback and invalidate */
-		dma_cache_wback_inv(vaddr, size);
+		dma_cache_wback_inv(p1addr, size);
 		break;
 	default:
 		BUG();
 	}
 }
-
+EXPORT_SYMBOL(consistent_sync);
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 95b5368c0670..7b49b6976e78 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -3,7 +3,7 @@
  *  linux/arch/sh/mm/init.c
  *
  *  Copyright (C) 1999  Niibe Yutaka
- *  Copyright (C) 2002  Paul Mundt
+ *  Copyright (C) 2002, 2004  Paul Mundt
  *
  *  Based on linux/arch/i386/mm/init.c:
  *   Copyright (C) 1995  Linus Torvalds
@@ -66,7 +66,7 @@ void show_mem(void)
 
 	printk("Mem-info:\n");
 	show_free_areas();
-	printk("Free swap:       %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10));
+	printk("Free swap:       %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10));
 	i = max_mapnr;
 	while (i-- > 0) {
 		total++;
@@ -83,6 +83,66 @@ void show_mem(void)
 	printk("%d pages swap cached\n",cached);
 }
 
+static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
+{
+	pgd_t *pgd;
+	pmd_t *pmd;
+	pte_t *pte;
+
+	pgd = swapper_pg_dir + pgd_index(addr);
+	if (pgd_none(*pgd)) {
+		pgd_ERROR(*pgd);
+		return;
+	}
+
+	pmd = pmd_offset(pgd, addr);
+	if (pmd_none(*pmd)) {
+		pte = (pte_t *)get_zeroed_page(GFP_ATOMIC);
+		set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE | _PAGE_USER));
+		if (pte != pte_offset_kernel(pmd, 0)) {
+			pmd_ERROR(*pmd);
+			return;
+		}
+	}
+
+	pte = pte_offset_kernel(pmd, addr);
+	if (!pte_none(*pte)) {
+		pte_ERROR(*pte);
+		return;
+	}
+
+	set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot));
+
+	__flush_tlb_page(get_asid(), addr);
+}
+
+/*
+ * As a performance optimization, other platforms preserve the fixmap mapping
+ * across a context switch, we don't presently do this, but this could be done
+ * in a similar fashion as to the wired TLB interface that sh64 uses (by way
+ * of the memorry mapped UTLB configuration) -- this unfortunately forces us to
+ * give up a TLB entry for each mapping we want to preserve. While this may be
+ * viable for a small number of fixmaps, it's not particularly useful for
+ * everything and needs to be carefully evaluated. (ie, we may want this for
+ * the vsyscall page).
+ *
+ * XXX: Perhaps add a _PAGE_WIRED flag or something similar that we can pass
+ * in at __set_fixmap() time to determine the appropriate behavior to follow.
+ *
+ *					 -- PFM.
+ */
+void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot)
+{
+	unsigned long address = __fix_to_virt(idx);
+
+	if (idx >= __end_of_fixed_addresses) {
+		BUG();
+		return;
+	}
+
+	set_pte_phys(address, phys, prot);
+}
+
 /* References to section boundaries */
 
 extern char _text, _etext, _edata, __bss_start, _end;
diff --git a/arch/sh/mm/pg-sh4.c b/arch/sh/mm/pg-sh4.c
index 07cbbd6c1a88..f6a76230872f 100644
--- a/arch/sh/mm/pg-sh4.c
+++ b/arch/sh/mm/pg-sh4.c
@@ -1,7 +1,5 @@
-/* 
- * $Id: pg-sh4.c,v 1.1.2.2 2002/11/17 17:56:18 lethal Exp $
- *
- *  arch/sh/mm/pg-sh4.c
+/*
+ * arch/sh/mm/pg-sh4.c
  *
  * Copyright (C) 1999, 2000, 2002  Niibe Yutaka
  * Copyright (C) 2002  Paul Mundt
@@ -101,3 +99,24 @@ void copy_user_page(void *to, void *from, unsigned long address,
 		up(&p3map_sem[(address & CACHE_ALIAS)>>12]);
 	}
 }
+
+/*
+ * For SH-4, we have our own implementation for ptep_get_and_clear
+ */
+inline pte_t ptep_get_and_clear(pte_t *ptep)
+{
+	pte_t pte = *ptep;
+
+	pte_clear(ptep);
+	if (!pte_not_present(pte)) {
+		unsigned long pfn = pte_pfn(pte);
+		if (pfn_valid(pfn)) {
+			struct page *page = pfn_to_page(pfn);
+			struct address_space *mapping = page_mapping(page);
+			if (!mapping || !mapping_writably_mapped(mapping))
+				__clear_bit(PG_mapped, &page->flags);
+		}
+	}
+	return pte;
+}
+
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c
index 88213cef3dea..318d1a529b49 100644
--- a/arch/sh/mm/tlb-sh3.c
+++ b/arch/sh/mm/tlb-sh3.c
@@ -72,7 +72,7 @@ void __flush_tlb_page(unsigned long asid, unsigned long page)
 	addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000);
 	data = (page & 0xfffe0000) | asid; /* VALID bit is off */
 	
-	if (test_bit(CPU_HAS_MMU_PAGE_ASSOC, &(cpu_data->flags))) {
+	if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) {
 		addr |= MMU_PAGE_ASSOC_BIT;
 		ways = 1;	/* we already know the way .. */
 	}
diff --git a/arch/sh/ramdisk/Makefile b/arch/sh/ramdisk/Makefile
new file mode 100644
index 000000000000..a22d86bf0c45
--- /dev/null
+++ b/arch/sh/ramdisk/Makefile
@@ -0,0 +1,19 @@
+#
+# Makefile for a ramdisk image
+#
+
+obj-y += ramdisk.o
+
+
+O_FORMAT = $(shell $(OBJDUMP) -i | head -n 2 | grep elf32)
+img := $(subst ",,$(CONFIG_EMBEDDED_RAMDISK_IMAGE))
+# add $(src) when $(img) is relative
+img := $(subst $(src)//,/,$(src)/$(img))
+
+quiet_cmd_ramdisk = LD      $@
+define cmd_ramdisk
+	$(LD) -T $(src)/ld.script -b binary --oformat $(O_FORMAT) -o $@ $(img)
+endef
+
+$(obj)/ramdisk.o: $(img) $(src)/ld.script
+	$(call cmd,ramdisk)
diff --git a/arch/sh/ramdisk/ld.script b/arch/sh/ramdisk/ld.script
new file mode 100644
index 000000000000..94beee248c04
--- /dev/null
+++ b/arch/sh/ramdisk/ld.script
@@ -0,0 +1,9 @@
+OUTPUT_ARCH(sh)
+SECTIONS
+{
+  .initrd :
+  {
+       *(.data)
+  }
+}
+
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index be54d527dc30..faf6d9e38bff 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -7,6 +7,7 @@
 #
 SE			SH_SOLUTION_ENGINE
 7751SE			SH_7751_SOLUTION_ENGINE		
+7300SE			SH_7300_SOLUTION_ENGINE
 7751SYSTEMH		SH_7751_SYSTEMH
 HP600			SH_HP600
 HP620			SH_HP620
@@ -21,4 +22,6 @@ BIGSUR			SH_BIGSUR
 ADX			SH_ADX
 MPC1211			SH_MPC1211
 SNAPGEAR		SH_SECUREEDGE5410
+HS7751RVOIP		SH_HS7751RVOIP
+RTS7751R2D		SH_RTS7751R2D