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authorChang S. Bae <chang.seok.bae@intel.com>2025-09-21 15:48:36 -0700
committerBorislav Petkov (AMD) <bp@alien8.de>2025-10-15 16:46:58 +0200
commit7cdda85ed90c1abaccaf5f05ec217acbc102c164 (patch)
tree292a7a452886ea08eafdd8a1a3b1b796eeb4b853 /drivers/pci/controller/dwc/pcie-qcom-common.c
parented44a5625f304ff14d01acfa086e77b5262a842f (diff)
x86/microcode: Introduce staging step to reduce late-loading time
As microcode patch sizes continue to grow, late-loading latency spikes can lead to timeouts and disruptions in running workloads. This trend of increasing patch sizes is expected to continue, so a foundational solution is needed to address the issue. To mitigate the problem, introduce a microcode staging feature. This option processes most of the microcode update (excluding activation) on a non-critical path, allowing CPUs to remain operational during the majority of the update. By offloading work from the critical path, staging can significantly reduce latency spikes. Integrate staging as a preparatory step in late-loading. Introduce a new callback for staging, which is invoked at the beginning of load_late_stop_cpus(), before CPUs enter the rendezvous phase. Staging follows an opportunistic model: * If successful, it reduces CPU rendezvous time * Even though it fails, the process falls back to the legacy path to finish the loading process but with potentially higher latency. Extend struct microcode_ops to incorporate staging properties, which will be implemented in the vendor code separately. Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Chao Gao <chao.gao@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Tested-by: Anselm Busse <abusse@amazon.de> Link: https://lore.kernel.org/20250320234104.8288-1-chang.seok.bae@intel.com
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