diff options
| author | Damien George <damien@micropython.org> | 2025-09-17 11:41:59 +1000 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2025-09-18 23:32:44 +1000 |
| commit | ec1bfcfbb7944bb7bbf5048de0152867cf71817b (patch) | |
| tree | ada4c5e91f9bec09aff4f3a8e73f40c9c3f8e85e | |
| parent | 8d04f5da7df99f105523c32ceaeb72113e09a18c (diff) | |
stm32/main: Use defined constants to enable N6 clocks during low power.
Use constants from the HAL instead of literal numbers to select which
peripheral clocks are enabled during low power mode.
Signed-off-by: Damien George <damien@micropython.org>
| -rw-r--r-- | ports/stm32/main.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/ports/stm32/main.c b/ports/stm32/main.c index af4d7f8bb..8bce6b477 100644 --- a/ports/stm32/main.c +++ b/ports/stm32/main.c @@ -400,19 +400,21 @@ void stm32_main(uint32_t reset_mode) { #if defined(STM32N6) // SRAM, XSPI needs to remain awake during sleep, eg so DMA from flash works. - LL_MEM_EnableClockLowPower(0xffffffff); + LL_MEM_EnableClockLowPower(LL_MEM_AXISRAM1 | LL_MEM_AXISRAM2 | LL_MEM_AXISRAM3 + | LL_MEM_AXISRAM4 | LL_MEM_AXISRAM5 | LL_MEM_AXISRAM6 | LL_MEM_AHBSRAM1 | LL_MEM_AHBSRAM2 + | LL_MEM_BKPSRAM | LL_MEM_FLEXRAM | LL_MEM_CACHEAXIRAM | LL_MEM_VENCRAM | LL_MEM_BOOTROM); LL_AHB5_GRP1_EnableClockLowPower(LL_AHB5_GRP1_PERIPH_XSPI2 | LL_AHB5_GRP1_PERIPH_XSPIM); LL_APB4_GRP1_EnableClock(LL_APB4_GRP1_PERIPH_RTC | LL_APB4_GRP1_PERIPH_RTCAPB); LL_APB4_GRP1_EnableClockLowPower(LL_APB4_GRP1_PERIPH_RTC | LL_APB4_GRP1_PERIPH_RTCAPB); // Enable some AHB peripherals during sleep. - LL_AHB1_GRP1_EnableClockLowPower(0xffffffff); // GPDMA1, ADC12 - LL_AHB4_GRP1_EnableClockLowPower(0xffffffff); // GPIOA-Q, PWR, CRC + LL_AHB1_GRP1_EnableClockLowPower(LL_AHB1_GRP1_PERIPH_ALL); // GPDMA1, ADC12 + LL_AHB4_GRP1_EnableClockLowPower(LL_AHB4_GRP1_PERIPH_ALL); // GPIOA-Q, PWR, CRC // Enable some APB peripherals during sleep. - LL_APB1_GRP1_EnableClockLowPower(0xffffffff); // I2C, I3C, LPTIM, SPI, TIM, UART, WWDG - LL_APB2_GRP1_EnableClockLowPower(0xffffffff); // SAI, SPI, TIM, UART - LL_APB4_GRP1_EnableClockLowPower(0xffffffff); // I2C, LPTIM, LPUART, RTC, SPI + LL_APB1_GRP1_EnableClockLowPower(LL_APB1_GRP1_PERIPH_ALL); // I2C, I3C, LPTIM, SPI, TIM, UART, WWDG + LL_APB2_GRP1_EnableClockLowPower(LL_APB2_GRP1_PERIPH_ALL); // SAI, SPI, TIM, UART + LL_APB4_GRP1_EnableClockLowPower(LL_APB4_GRP1_PERIPH_ALL); // I2C, LPTIM, LPUART, RTC, SPI #endif mpu_init(); |