diff options
Diffstat (limited to 'tests/extmod/machine_uart_tx.py')
| -rw-r--r-- | tests/extmod/machine_uart_tx.py | 25 |
1 files changed, 5 insertions, 20 deletions
diff --git a/tests/extmod/machine_uart_tx.py b/tests/extmod/machine_uart_tx.py index 85bf7e9fb..70d57be46 100644 --- a/tests/extmod/machine_uart_tx.py +++ b/tests/extmod/machine_uart_tx.py @@ -8,50 +8,35 @@ except ImportError: raise SystemExit import time, sys +from target_wiring import uart_loopback_args, uart_loopback_kwargs initial_delay_ms = 0 bit_margin = 0 timing_margin_us = 100 -# Configure pins based on the target. +# Tune test parameters based on the target. if "alif" in sys.platform: - uart_id = 1 - pins = {} bit_margin = 1 elif "esp32" in sys.platform: - uart_id = 1 - pins = {} timing_margin_us = 400 elif "mimxrt" in sys.platform: - uart_id = 1 - pins = {} initial_delay_ms = 20 # UART sends idle frame after init, so wait for that bit_margin = 1 +elif "nrf" in sys.platform: + timing_margin_us = 130 elif "pyboard" in sys.platform: - if "STM32WB" in sys.implementation._machine: - uart_id = "LP1" - else: - uart_id = 4 - pins = {} initial_delay_ms = 50 # UART sends idle frame after init, so wait for that bit_margin = 1 # first start-bit must wait to sync with the UART clock elif "rp2" in sys.platform: - uart_id = 0 - pins = {"tx": "GPIO0", "rx": "GPIO1"} timing_margin_us = 180 elif "samd" in sys.platform: - uart_id = 2 - pins = {"tx": "D1", "rx": "D0"} timing_margin_us = 300 bit_margin = 1 -else: - print("SKIP") - raise SystemExit # Test that write+flush takes the expected amount of time to execute. for bits_per_s in (2400, 9600, 115200): text = "Hello World" - uart = UART(uart_id, bits_per_s, bits=8, parity=None, stop=1, **pins) + uart = UART(*uart_loopback_args, baudrate=bits_per_s, **uart_loopback_kwargs) time.sleep_ms(initial_delay_ms) start_us = time.ticks_us() |